Commits

Branch selector

 99a12ff

User selector

All users

Datepicker

All time

Commit History

Commits on Nov 19, 2019

• [doc] Update mhartid CSR description

  Show description for 99a12ff
  vogelpi

  committed
  99a12ff

  Copy full SHA for 99a12ff

• [doc] Document debug CSRs

  Show description for 46608d9
  vogelpi

  committed
  46608d9

  Copy full SHA for 46608d9

• [rtl] Do not update CSRs upon exceptions in debug mode

  Show description for d117b24
  vogelpi

  committed
  d117b24

  Copy full SHA for d117b24

Commits on Nov 18, 2019

• [DV] umode_tw test (lowRISC#481)

  Show description for 8112ba5
  

  udinator

  authored
  8112ba5

  Copy full SHA for 8112ba5

• [DV] Add exit check for setup call

  Show description for 21f2a84
  towoe

  committed
  21f2a84

  Copy full SHA for 21f2a84

• Fix typo in comment

  imphil

  committed
  7465a68

  Copy full SHA for 7465a68

• [csr tb] Declare registers as a macro list

  Show description for 88158e6
  

  Tom Roberts

  authored and

  tomeroberts

  committed
  88158e6

  Copy full SHA for 88158e6

Commits on Nov 15, 2019

• [dv] Remove clock gating primitive in dv/uvm/tb

  Show description for 40d6368
  vogelpi

  committed
  40d6368

  Copy full SHA for 40d6368

• [rtl] Add new assertions

  Show description for aefbcdc
  vogelpi

  committed
  aefbcdc

  Copy full SHA for aefbcdc

• [rtl] Rework assertions

  Show description for 40e3db5
  vogelpi

  committed
  40e3db5

  Copy full SHA for 40e3db5

• [DV] Enable user-mode in DV environment, add basic tests (lowRISC#471)

  Show description for c05634c
  

  udinator

  authored
  c05634c

  Copy full SHA for c05634c

Commits on Nov 14, 2019

• Update fusesoc usage

  towoe

  committed
  103b735

  Copy full SHA for 103b735

• Use shared code for Arty A7-100T example

  Show description for 76f6a3d
  towoe

  committed
  76f6a3d

  Copy full SHA for 76f6a3d

• Delay simulator finish

  Show description for 6be1e8a
  

  towoe

  authored and

  imphil

  committed
  6be1e8a

  Copy full SHA for 6be1e8a

• [rtl] Rework core_busy signals, remove feedback to clk

  Show description for 9738b6c
  vogelpi

  committed
  9738b6c

  Copy full SHA for 9738b6c

• [rtl] Switch to M mode on debug entry

  Show description for 0243e08
  

  Tom Roberts

  authored and

  tomeroberts

  committed
  0243e08

  Copy full SHA for 0243e08

Commits on Nov 13, 2019

• Use gitignore for software directory

  towoe

  committed
  0927f08

  Copy full SHA for 0927f08

• Update load instruction

  towoe

  committed
  ef96678

  Copy full SHA for ef96678

• [rtl/controller] Remove redundant check in EBREAK handling

  Show description for 52b03f3
  vogelpi

  committed
  52b03f3

  Copy full SHA for 52b03f3

• [rtl/controller] Remove redundant check in execption handling

  Show description for 6a5ee22
  vogelpi

  committed
  6a5ee22

  Copy full SHA for 6a5ee22

• [rtl] Ignore LSB only for writes to dpc

  Show description for d538261
  vogelpi

  committed
  d538261

  Copy full SHA for d538261

• Fix formatting of table in simple system

  Show description for 9b390c5
  

  MarekPikula

  authored and

  imphil

  committed
  9b390c5

  Copy full SHA for 9b390c5

Commits on Nov 12, 2019

• Update google_riscv-dv to chipsalliance/riscv-dv@4b333ba (lowRISC#462)

  Show description for 6ce8b6e
  

  udinator

  authored
  6ce8b6e

  Copy full SHA for 6ce8b6e

• Add rv32Zicsr target in azure

  Show description for 1cc4831
  

  towoe

  authored and

  imphil

  committed
  1cc4831

  Copy full SHA for 1cc4831

• Update expected failure for riscv-compliance

  Show description for 87b05b6
  

  towoe

  authored and

  imphil

  committed
  87b05b6

  Copy full SHA for 87b05b6

• [funct_cov] Fix GPR assignment bug (lowRISC#456)

  

  udinator

  authored
  7ea79ae

  Copy full SHA for 7ea79ae

• [Doc] Update verification documentation (lowRISC#449)

  

  udinator

  authored
  2ee9828

  Copy full SHA for 2ee9828

Commits on Nov 11, 2019

• [funct_cov] Update Makefile options for coverage (lowRISC#455)

  

  udinator

  authored
  2a3c6c6

  Copy full SHA for 2a3c6c6

• [funct_cov] Update Ibex log parsing (lowRISC#453)

  

  udinator

  authored
  23589f5

  Copy full SHA for 23589f5

• [rtl] Rework access to performance counter CSRs

  Show description for 0a1a851
  vogelpi

  committed
  0a1a851

  Copy full SHA for 0a1a851

Commits on Nov 9, 2019

• Added simple system

  Show description for 2041f10
  

  GregAC

  authored and

  imphil

  committed
  2041f10

  Copy full SHA for 2041f10

• Added top-level shared directory

  Show description for 31d423a
  

  GregAC

  authored and

  imphil

  committed
  31d423a

  Copy full SHA for 31d423a

Commits on Nov 5, 2019

• [DV] clean up stale TODOs (lowRISC#448)

  

  udinator

  authored
  502b5a9

  Copy full SHA for 502b5a9

Commits on Nov 4, 2019

• Update google_riscv-dv to chipsalliance/riscv-dv@44bec76 (lowRISC#447)

  Show description for 498786a
  

  udinator

  authored and

  taoliug

  committed
  498786a

  Copy full SHA for 498786a

• [DV/flow] Integrate with RISCV-DV (lowRISC#446)

  

  udinator

  authored
  098fb7d

  Copy full SHA for 098fb7d

Pagination

Previous

Next