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ARM: dts: omap3: Update clksel clocks to use reg instead of ti,bit-shift
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For the clksel clocks we are still using the legacy ti,bit-shift property
instead of the standard reg property. We can now use the reg property, so
let's do that for the clksel clocks.

To add the reg property, we switch to use #address-cells = <1>.

For now let's not update the clock-dss-tv-fck as it seems to share the same
register bit as the clock-dss-96m-fck and would introduce more warnings.

Cc: Andreas Kemnade <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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@tmlind
tmlind committed Feb 26, 2024
1 parent 579856a commit 808e653
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Showing 7 changed files with 396 additions and 351 deletions.
18 changes: 10 additions & 8 deletions arch/arm/boot/dts/ti/omap/am35xx-clocks.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -66,22 +66,23 @@
compatible = "ti,clksel";
reg = <0xa10>;
#clock-cells = <2>;
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;

ipss_ick: clock-ipss-ick {
ipss_ick: clock-ipss-ick@4 {
reg = <4>;
#clock-cells = <0>;
compatible = "ti,am35xx-interface-clock";
clock-output-names = "ipss_ick";
clocks = <&core_l3_ick>;
ti,bit-shift = <4>;
};

uart4_ick_am35xx: clock-uart4-ick-am35xx {
uart4_ick_am35xx: clock-uart4-ick-am35xx@23 {
reg = <23>;
#clock-cells = <0>;
compatible = "ti,omap3-interface-clock";
clock-output-names = "uart4_ick_am35xx";
clocks = <&core_l4_ick>;
ti,bit-shift = <23>;
};
};

Expand All @@ -101,14 +102,15 @@
compatible = "ti,clksel";
reg = <0xa00>;
#clock-cells = <2>;
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;

uart4_fck_am35xx: clock-uart4-fck-am35xx {
uart4_fck_am35xx: clock-uart4-fck-am35xx@23 {
reg = <23>;
#clock-cells = <0>;
compatible = "ti,wait-gate-clock";
clock-output-names = "uart4_fck_am35xx";
clocks = <&core_48m_fck>;
ti,bit-shift = <23>;
};
};
};
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52 changes: 28 additions & 24 deletions arch/arm/boot/dts/ti/omap/omap3430es1-clocks.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -50,54 +50,56 @@
compatible = "ti,clksel";
reg = <0xa00>;
#clock-cells = <2>;
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;

d2d_26m_fck: clock-d2d-26m-fck {
d2d_26m_fck: clock-d2d-26m-fck@3 {
reg = <3>;
#clock-cells = <0>;
compatible = "ti,wait-gate-clock";
clock-output-names = "d2d_26m_fck";
clocks = <&sys_ck>;
ti,bit-shift = <3>;
};

fshostusb_fck: clock-fshostusb-fck {
fshostusb_fck: clock-fshostusb-fck@5 {
reg = <5>;
#clock-cells = <0>;
compatible = "ti,wait-gate-clock";
clock-output-names = "fshostusb_fck";
clocks = <&core_48m_fck>;
ti,bit-shift = <5>;
};

ssi_ssr_gate_fck_3430es1: clock-ssi-ssr-gate-fck-3430es1 {
ssi_ssr_gate_fck_3430es1: clock-ssi-ssr-gate-fck-3430es1@0 {
reg = <0>;
#clock-cells = <0>;
compatible = "ti,composite-no-wait-gate-clock";
clock-output-names = "ssi_ssr_gate_fck_3430es1";
clocks = <&corex2_fck>;
ti,bit-shift = <0>;
};
};

clock@a40 {
compatible = "ti,clksel";
reg = <0xa40>;
#clock-cells = <2>;
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;

ssi_ssr_div_fck_3430es1: clock-ssi-ssr-div-fck-3430es1 {
ssi_ssr_div_fck_3430es1: clock-ssi-ssr-div-fck-3430es1@8 {
reg = <8>;
#clock-cells = <0>;
compatible = "ti,composite-divider-clock";
clock-output-names = "ssi_ssr_div_fck_3430es1";
clocks = <&corex2_fck>;
ti,bit-shift = <8>;
ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
};

usb_l4_div_ick: clock-usb-l4-div-ick {
usb_l4_div_ick: clock-usb-l4-div-ick@4 {
reg = <4>;
#clock-cells = <0>;
compatible = "ti,composite-divider-clock";
clock-output-names = "usb_l4_div_ick";
clocks = <&l4_ick>;
ti,bit-shift = <4>;
ti,max-div = <1>;
ti,index-starts-at-one;
};
Expand All @@ -121,38 +123,39 @@
compatible = "ti,clksel";
reg = <0xa10>;
#clock-cells = <2>;
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;

hsotgusb_ick_3430es1: clock-hsotgusb-ick-3430es1 {
hsotgusb_ick_3430es1: clock-hsotgusb-ick-3430es1@4 {
reg = <4>;
#clock-cells = <0>;
compatible = "ti,omap3-no-wait-interface-clock";
clock-output-names = "hsotgusb_ick_3430es1";
clocks = <&core_l3_ick>;
ti,bit-shift = <4>;
};

fac_ick: clock-fac-ick {
fac_ick: clock-fac-ick@8 {
reg = <8>;
#clock-cells = <0>;
compatible = "ti,omap3-interface-clock";
clock-output-names = "fac_ick";
clocks = <&core_l4_ick>;
ti,bit-shift = <8>;
};

ssi_ick: clock-ssi-ick-3430es1 {
ssi_ick: clock-ssi-ick-3430es1@0 {
reg = <0>;
#clock-cells = <0>;
compatible = "ti,omap3-no-wait-interface-clock";
clock-output-names = "ssi_ick_3430es1";
clocks = <&ssi_l4_ick>;
ti,bit-shift = <0>;
};

usb_l4_gate_ick: clock-usb-l4-gate-ick {
usb_l4_gate_ick: clock-usb-l4-gate-ick@5 {
reg = <5>;
#clock-cells = <0>;
compatible = "ti,composite-interface-clock";
clock-output-names = "usb_l4_gate_ick";
clocks = <&l4_ick>;
ti,bit-shift = <5>;
};
};

Expand All @@ -174,14 +177,15 @@
compatible = "ti,clksel";
reg = <0xe00>;
#clock-cells = <2>;
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;

dss1_alwon_fck: clock-dss1-alwon-fck-3430es1 {
dss1_alwon_fck: clock-dss1-alwon-fck-3430es1@0 {
reg = <0>;
#clock-cells = <0>;
compatible = "ti,gate-clock";
clock-output-names = "dss1_alwon_fck_3430es1";
clocks = <&dpll4_m4x2_ck>;
ti,bit-shift = <0>;
ti,set-rate-parent;
};
};
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