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Merge tag 'mmc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/gi…
…t/ulfh/mmc Pull MMC updates from Ulf Hansson: "MMC core: - Add support for eMMC inline encryption - Add a helper function to parse DT properties for clock phases - Some improvements and cleanups for the mmc_test module MMC host: - android-goldfish: Remove driver - cqhci: Add support for eMMC inline encryption - dw_mmc-zx: Remove driver - meson-gx: Extend support for scatter-gather to allow SD_IO_RW_EXTENDED - mmci: Add support for probing bus voltage level translator - mtk-sd: Address race condition for request timeouts - sdhci_am654: Add Support for the variant on TI's AM64 SoC - sdhci-esdhc-imx: Prevent kernel panic at ->remove() - sdhci-iproc: Add ACPI bindings for the RPi to enable SD and WiFi on RPi4 - sdhci-msm: Add Inline Crypto Engine support - sdhci-msm: Use actual_clock to improve timeout calculations - sdhci-of-aspeed: Add Andrew Jeffery as maintainer - sdhci-of-aspeed: Extend clock support for the AST2600 variant - sdhci-pci-gli: Increase idle period for low power state for GL9763E - sdhci-pci-o2micro: Make tuning for SDR104 HW more robust - sdhci-sirf: Remove driver - sdhci-xenon: Add support for the AP807 variant - sunxi-mmc: Add support for the A100 variant - sunxi-mmc: Ensure host is suspended during system sleep - tmio: Add detection of data timeout errors - tmio/renesas_sdhi: Extend support for retuning - renesas_sdhi_internal_dmac: Add support for the ->pre|post_req() ops" * tag 'mmc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (86 commits) mmc: sdhci-esdhc-imx: fix kernel panic when remove module mmc: host: Retire MMC_GOLDFISH mmc: cb710: Use new tasklet API mmc: sdhci-pci-o2micro: Bug fix for SDR104 HW tuning failure mmc: mmc_test: use erase_arg for mmc_erase command mmc: wbsd: Use new tasklet API mmc: via-sdmmc: Use new tasklet API mmc: uniphier-sd: Use new tasklet API mmc: tifm_sd: Use new tasklet API mmc: s3cmci: Use new tasklet API mmc: omap: Use new tasklet API mmc: dw_mmc: Use new tasklet API mmc: au1xmmc: Use new tasklet API mmc: atmel-mci: Use new tasklet API mmc: cavium: Replace spin_lock_irqsave with spin_lock in hard IRQ mmc: queue: Remove unused define mmc: core: Drop redundant bouncesz from struct mmc_card mmc: core: Drop redundant member in struct mmc host mmc: core: Use host instead of card argument to mmc_spi_send_csd() mmc: core: Exclude unnecessary header file ...
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| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | ||
| %YAML 1.2 | ||
| --- | ||
| $id: http://devicetree.org/schemas/mmc/arm,pl18x.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
|
|
||
| title: ARM PrimeCell MultiMedia Card Interface (MMCI) PL180 and PL181 | ||
|
|
||
| maintainers: | ||
| - Linus Walleij <[email protected]> | ||
| - Ulf Hansson <[email protected]> | ||
|
|
||
| description: | ||
| The ARM PrimeCells MMCI PL180 and PL181 provides an interface for | ||
| reading and writing to MultiMedia and SD cards alike. Over the years | ||
| vendors have use the VHDL code from ARM to create derivative MMC/SD/SDIO | ||
| host controllers with very similar characteristics. | ||
|
|
||
| allOf: | ||
| - $ref: /schemas/arm/primecell.yaml# | ||
| - $ref: mmc-controller.yaml# | ||
|
|
||
| # We need a select here so we don't match all nodes with 'arm,primecell' | ||
| select: | ||
| properties: | ||
| compatible: | ||
| contains: | ||
| enum: | ||
| - arm,pl180 | ||
| - arm,pl181 | ||
| - arm,pl18x | ||
| required: | ||
| - compatible | ||
|
|
||
| properties: | ||
| compatible: | ||
| oneOf: | ||
| - description: The first version of the block, simply called | ||
| PL180 and found in the ARM Integrator IM/PD1 logic module. | ||
| items: | ||
| - const: arm,pl180 | ||
| - const: arm,primecell | ||
| - description: The improved version of the block, found in the | ||
| ARM Versatile and later reference designs. Further revisions | ||
| exist but get detected at runtime by reading some magic numbers | ||
| in the PrimeCell ID registers. | ||
| items: | ||
| - const: arm,pl181 | ||
| - const: arm,primecell | ||
| - description: Wildcard entry that will let the operating system | ||
| inspect the PrimeCell ID registers to determine which hardware | ||
| variant of PL180 or PL181 this is. | ||
| items: | ||
| - const: arm,pl18x | ||
| - const: arm,primecell | ||
|
|
||
| clocks: | ||
| description: One or two clocks, the "apb_pclk" and the "MCLK" | ||
| which is the core block clock. The names are not compulsory. | ||
| minItems: 1 | ||
| maxItems: 2 | ||
|
|
||
| power-domains: true | ||
|
|
||
| resets: | ||
| maxItems: 1 | ||
|
|
||
| reg: | ||
| description: the MMIO memory window must be exactly 4KB (0x1000) and the | ||
| layout should provide the PrimeCell ID registers so that the device can | ||
| be discovered. On ST Micro variants, a second register window may be | ||
| defined if a delay block is present and used for tuning. | ||
|
|
||
| interrupts: | ||
| description: The first interrupt is the command interrupt and corresponds | ||
| to the event at the end of a command. The second interrupt is the | ||
| PIO (polled I/O) interrupt and occurs when the FIFO needs to be | ||
| emptied as part of a bulk read from the card. Some variants have these | ||
| two interrupts wired into the same line (logic OR) and in that case | ||
| only one interrupt may be provided. | ||
| minItems: 1 | ||
| maxItems: 2 | ||
|
|
||
| st,sig-dir-dat0: | ||
| $ref: /schemas/types.yaml#/definitions/flag | ||
| description: ST Micro-specific property, bus signal direction pins used for | ||
| DAT[0]. | ||
|
|
||
| st,sig-dir-dat2: | ||
| $ref: /schemas/types.yaml#/definitions/flag | ||
| description: ST Micro-specific property, bus signal direction pins used for | ||
| DAT[2]. | ||
|
|
||
| st,sig-dir-dat31: | ||
| $ref: /schemas/types.yaml#/definitions/flag | ||
| description: ST Micro-specific property, bus signal direction pins used for | ||
| DAT[3] and DAT[1]. | ||
|
|
||
| st,sig-dir-dat74: | ||
| $ref: /schemas/types.yaml#/definitions/flag | ||
| description: ST Micro-specific property, bus signal direction pins used for | ||
| DAT[7] and DAT[4]. | ||
|
|
||
| st,sig-dir-cmd: | ||
| $ref: /schemas/types.yaml#/definitions/flag | ||
| description: ST Micro-specific property, CMD signal direction used for | ||
| pin CMD. | ||
|
|
||
| st,sig-pin-fbclk: | ||
| $ref: /schemas/types.yaml#/definitions/flag | ||
| description: ST Micro-specific property, feedback clock FBCLK signal pin | ||
| in use. | ||
|
|
||
| st,sig-dir: | ||
| $ref: /schemas/types.yaml#/definitions/flag | ||
| description: ST Micro-specific property, signal direction polarity used for | ||
| pins CMD, DAT[0], DAT[1], DAT[2] and DAT[3]. | ||
|
|
||
| st,neg-edge: | ||
| $ref: /schemas/types.yaml#/definitions/flag | ||
| description: ST Micro-specific property, data and command phase relation, | ||
| generated on the sd clock falling edge. | ||
|
|
||
| st,use-ckin: | ||
| $ref: /schemas/types.yaml#/definitions/flag | ||
| description: ST Micro-specific property, use CKIN pin from an external | ||
| driver to sample the receive data (for example with a voltage switch | ||
| transceiver). | ||
|
|
||
| st,cmd-gpios: | ||
| maxItems: 1 | ||
| description: | ||
| The GPIO matching the CMD pin. | ||
|
|
||
| st,ck-gpios: | ||
| maxItems: 1 | ||
| description: | ||
| The GPIO matching the CK pin. | ||
|
|
||
| st,ckin-gpios: | ||
| maxItems: 1 | ||
| description: | ||
| The GPIO matching the CKIN pin. | ||
|
|
||
| dependencies: | ||
| st,cmd-gpios: [ "st,use-ckin" ] | ||
| st,ck-gpios: [ "st,use-ckin" ] | ||
| st,ckin-gpios: [ "st,use-ckin" ] | ||
|
|
||
| unevaluatedProperties: false | ||
|
|
||
| required: | ||
| - compatible | ||
| - reg | ||
| - interrupts | ||
|
|
||
| examples: | ||
| - | | ||
| #include <dt-bindings/interrupt-controller/irq.h> | ||
| #include <dt-bindings/gpio/gpio.h> | ||
| mmc@5000 { | ||
| compatible = "arm,pl180", "arm,primecell"; | ||
| reg = <0x5000 0x1000>; | ||
| interrupts-extended = <&vic 22 &sic 1>; | ||
| clocks = <&xtal24mhz>, <&pclk>; | ||
| clock-names = "mclk", "apb_pclk"; | ||
| }; | ||
| mmc@80126000 { | ||
| compatible = "arm,pl18x", "arm,primecell"; | ||
| reg = <0x80126000 0x1000>; | ||
| interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>; | ||
| dmas = <&dma 29 0 0x2>, <&dma 29 0 0x0>; | ||
| dma-names = "rx", "tx"; | ||
| clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>; | ||
| clock-names = "sdi", "apb_pclk"; | ||
| max-frequency = <100000000>; | ||
| bus-width = <4>; | ||
| cap-sd-highspeed; | ||
| cap-mmc-highspeed; | ||
| cd-gpios = <&gpio2 31 0x4>; | ||
| st,sig-dir-dat0; | ||
| st,sig-dir-dat2; | ||
| st,sig-dir-cmd; | ||
| st,sig-pin-fbclk; | ||
| vmmc-supply = <&ab8500_ldo_aux3_reg>; | ||
| vqmmc-supply = <&vmmci>; | ||
| }; | ||
| mmc@101f6000 { | ||
| compatible = "arm,pl18x", "arm,primecell"; | ||
| reg = <0x101f6000 0x1000>; | ||
| clocks = <&sdiclk>, <&pclksdi>; | ||
| clock-names = "mclk", "apb_pclk"; | ||
| interrupt-parent = <&vica>; | ||
| interrupts = <22>; | ||
| max-frequency = <400000>; | ||
| bus-width = <4>; | ||
| cap-mmc-highspeed; | ||
| cap-sd-highspeed; | ||
| full-pwr-cycle; | ||
| st,sig-dir-dat0; | ||
| st,sig-dir-dat2; | ||
| st,sig-dir-dat31; | ||
| st,sig-dir-cmd; | ||
| st,sig-pin-fbclk; | ||
| vmmc-supply = <&vmmc_regulator>; | ||
| }; | ||
| mmc@52007000 { | ||
| compatible = "arm,pl18x", "arm,primecell"; | ||
| arm,primecell-periphid = <0x10153180>; | ||
| reg = <0x52007000 0x1000>; | ||
| interrupts = <49>; | ||
| interrupt-names = "cmd_irq"; | ||
| clocks = <&rcc 0>; | ||
| clock-names = "apb_pclk"; | ||
| resets = <&rcc 1>; | ||
| cap-sd-highspeed; | ||
| cap-mmc-highspeed; | ||
| max-frequency = <120000000>; | ||
| }; |
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