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drm/i915: s/pipe_config/crtc_state/ in the state checker
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Switch over to the modern variable naming in the state checker.
Ie. rename the pipe_config stuff to crtc_state.

Also make it clear which is the "software state" (ie. what the
current state should be) vs. "hardware state" (ie. what the
currnet state really is).

Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Jani Nikula <[email protected]>
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vsyrjala committed Oct 6, 2023
1 parent 4627bef commit 3ce6ac8
Showing 1 changed file with 28 additions and 28 deletions.
56 changes: 28 additions & 28 deletions drivers/gpu/drm/i915/display/intel_modeset_verify.c
Original file line number Diff line number Diff line change
Expand Up @@ -86,14 +86,14 @@ verify_connector_state(struct intel_atomic_state *state,
}
}

static void intel_pipe_config_sanity_check(const struct intel_crtc_state *pipe_config)
static void intel_pipe_config_sanity_check(const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev);
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);

if (pipe_config->has_pch_encoder) {
int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(dev_priv, pipe_config),
&pipe_config->fdi_m_n);
int dotclock = pipe_config->hw.adjusted_mode.crtc_clock;
if (crtc_state->has_pch_encoder) {
int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(dev_priv, crtc_state),
&crtc_state->fdi_m_n);
int dotclock = crtc_state->hw.adjusted_mode.crtc_clock;

/*
* FDI already provided one idea for the dotclock.
Expand Down Expand Up @@ -163,66 +163,66 @@ verify_crtc_state(struct intel_atomic_state *state,
{
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
const struct intel_crtc_state *new_crtc_state =
const struct intel_crtc_state *sw_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct intel_crtc_state *pipe_config;
struct intel_crtc_state *hw_crtc_state;
struct intel_crtc *master_crtc;
struct intel_encoder *encoder;

pipe_config = intel_crtc_state_alloc(crtc);
if (!pipe_config)
hw_crtc_state = intel_crtc_state_alloc(crtc);
if (!hw_crtc_state)
return;

drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s]\n", crtc->base.base.id,
crtc->base.name);

pipe_config->hw.enable = new_crtc_state->hw.enable;
hw_crtc_state->hw.enable = sw_crtc_state->hw.enable;

intel_crtc_get_pipe_config(pipe_config);
intel_crtc_get_pipe_config(hw_crtc_state);

/* we keep both pipes enabled on 830 */
if (IS_I830(dev_priv) && pipe_config->hw.active)
pipe_config->hw.active = new_crtc_state->hw.active;
if (IS_I830(dev_priv) && hw_crtc_state->hw.active)
hw_crtc_state->hw.active = sw_crtc_state->hw.active;

I915_STATE_WARN(dev_priv,
new_crtc_state->hw.active != pipe_config->hw.active,
sw_crtc_state->hw.active != hw_crtc_state->hw.active,
"crtc active state doesn't match with hw state (expected %i, found %i)\n",
new_crtc_state->hw.active, pipe_config->hw.active);
sw_crtc_state->hw.active, hw_crtc_state->hw.active);

I915_STATE_WARN(dev_priv, crtc->active != new_crtc_state->hw.active,
I915_STATE_WARN(dev_priv, crtc->active != sw_crtc_state->hw.active,
"transitional active state does not match atomic hw state (expected %i, found %i)\n",
new_crtc_state->hw.active, crtc->active);
sw_crtc_state->hw.active, crtc->active);

master_crtc = intel_master_crtc(new_crtc_state);
master_crtc = intel_master_crtc(sw_crtc_state);

for_each_encoder_on_crtc(dev, &master_crtc->base, encoder) {
enum pipe pipe;
bool active;

active = encoder->get_hw_state(encoder, &pipe);
I915_STATE_WARN(dev_priv, active != new_crtc_state->hw.active,
I915_STATE_WARN(dev_priv, active != sw_crtc_state->hw.active,
"[ENCODER:%i] active %i with crtc active %i\n",
encoder->base.base.id, active,
new_crtc_state->hw.active);
sw_crtc_state->hw.active);

I915_STATE_WARN(dev_priv, active && master_crtc->pipe != pipe,
"Encoder connected to wrong pipe %c\n",
pipe_name(pipe));

if (active)
intel_encoder_get_config(encoder, pipe_config);
intel_encoder_get_config(encoder, hw_crtc_state);
}

if (!new_crtc_state->hw.active)
if (!sw_crtc_state->hw.active)
return;

intel_pipe_config_sanity_check(pipe_config);
intel_pipe_config_sanity_check(hw_crtc_state);

if (!intel_pipe_config_compare(new_crtc_state,
pipe_config, false)) {
if (!intel_pipe_config_compare(sw_crtc_state,
hw_crtc_state, false)) {
I915_STATE_WARN(dev_priv, 1, "pipe state doesn't match!\n");
intel_crtc_state_dump(pipe_config, NULL, "hw state");
intel_crtc_state_dump(new_crtc_state, NULL, "sw state");
intel_crtc_state_dump(hw_crtc_state, NULL, "hw state");
intel_crtc_state_dump(sw_crtc_state, NULL, "sw state");
}
}

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