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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kern…
…el/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "Driver updates for ARM SoCs. A slew of changes this release cycle. The reset driver tree, that we merge through arm-soc for historical reasons, is also sizable this time around. Among the changes: - clps711x: Treewide changes to compatible strings, merged here for simplicity. - Qualcomm: SCM firmware driver cleanups, move to platform driver - ux500: Major cleanups, removal of old mach-specific infrastructure. - Atmel external bus memory driver - Move of brcmstb platform to the rest of bcm - PMC driver updates for tegra, various fixes and improvements - Samsung platform driver updates to support 64-bit Exynos platforms - Reset controller cleanups moving to devm_reset_controller_register() APIs - Reset controller driver for Amlogic Meson - Reset controller driver for Hisilicon hi6220 - ARM SCPI power domain support" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (100 commits) ARM: ux500: consolidate base platform files ARM: ux500: move soc_id driver to drivers/soc ARM: ux500: call ux500_setup_id later ARM: ux500: consolidate soc_device code in id.c ARM: ux500: remove cpu_is_u* helpers ARM: ux500: use CLK_OF_DECLARE() ARM: ux500: move l2x0 init to .init_irq mfd: db8500 stop passing around platform data ASoC: ab8500-codec: remove platform data based probe ARM: ux500: move ab8500_regulator_plat_data into driver ARM: ux500: remove unused regulator data soc: raspberrypi-power: add CONFIG_OF dependency firmware: scpi: add CONFIG_OF dependency video: clps711x-fb: Changing the compatibility string to match with the smallest supported chip input: clps711x-keypad: Changing the compatibility string to match with the smallest supported chip pwm: clps711x: Changing the compatibility string to match with the smallest supported chip serial: clps711x: Changing the compatibility string to match with the smallest supported chip irqchip: clps711x: Changing the compatibility string to match with the smallest supported chip clocksource: clps711x: Changing the compatibility string to match with the smallest supported chip clk: clps711x: Changing the compatibility string to match with the smallest supported chip ...
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Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt
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| NVIDIA Tegra ACONNECT Bus | ||
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| The Tegra ACONNECT bus is an AXI switch which is used to connnect various | ||
| components inside the Audio Processing Engine (APE). All CPU accesses to | ||
| the APE subsystem go through the ACONNECT via an APB to AXI wrapper. | ||
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| Required properties: | ||
| - compatible: Must be "nvidia,tegra210-aconnect". | ||
| - clocks: Must contain the entries for the APE clock (TEGRA210_CLK_APE), | ||
| and APE interface clock (TEGRA210_CLK_APB2APE). | ||
| - clock-names: Must contain the names "ape" and "apb2ape" for the corresponding | ||
| 'clocks' entries. | ||
| - power-domains: Must contain a phandle that points to the audio powergate | ||
| (namely 'aud') for Tegra210. | ||
| - #address-cells: The number of cells used to represent physical base addresses | ||
| in the aconnect address space. Should be 1. | ||
| - #size-cells: The number of cells used to represent the size of an address | ||
| range in the aconnect address space. Should be 1. | ||
| - ranges: Mapping of the aconnect address space to the CPU address space. | ||
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| All devices accessed via the ACONNNECT are described by child-nodes. | ||
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| Example: | ||
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| aconnect@702c0000 { | ||
| compatible = "nvidia,tegra210-aconnect"; | ||
| clocks = <&tegra_car TEGRA210_CLK_APE>, | ||
| <&tegra_car TEGRA210_CLK_APB2APE>; | ||
| clock-names = "ape", "apb2ape"; | ||
| power-domains = <&pd_audio>; | ||
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| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
| ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; | ||
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| status = "disabled"; | ||
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| child1 { | ||
| ... | ||
| }; | ||
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| child2 { | ||
| ... | ||
| }; | ||
| }; |
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| Device-Tree bindings for LIRC TX driver for Nokia N900(RX51) | ||
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| Required properties: | ||
| - compatible: should be "nokia,n900-ir". | ||
| - pwms: specifies PWM used for IR signal transmission. | ||
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| Example node: | ||
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| pwm9: dmtimer-pwm@9 { | ||
| compatible = "ti,omap-dmtimer-pwm"; | ||
| ti,timers = <&timer9>; | ||
| ti,clock-source = <0x00>; /* timer_sys_ck */ | ||
| #pwm-cells = <3>; | ||
| }; | ||
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| ir: n900-ir { | ||
| compatible = "nokia,n900-ir"; | ||
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| pwms = <&pwm9 0 26316 0>; /* 38000 Hz */ | ||
| }; |
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136
Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt
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| * Device tree bindings for Atmel EBI | ||
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| The External Bus Interface (EBI) controller is a bus where you can connect | ||
| asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs). | ||
| The EBI provides a glue-less interface to asynchronous memories through the SMC | ||
| (Static Memory Controller). | ||
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| Required properties: | ||
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| - compatible: "atmel,at91sam9260-ebi" | ||
| "atmel,at91sam9261-ebi" | ||
| "atmel,at91sam9263-ebi0" | ||
| "atmel,at91sam9263-ebi1" | ||
| "atmel,at91sam9rl-ebi" | ||
| "atmel,at91sam9g45-ebi" | ||
| "atmel,at91sam9x5-ebi" | ||
| "atmel,sama5d3-ebi" | ||
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| - reg: Contains offset/length value for EBI memory mapping. | ||
| This property might contain several entries if the EBI | ||
| memory range is not contiguous | ||
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| - #address-cells: Must be 2. | ||
| The first cell encodes the CS. | ||
| The second cell encode the offset into the CS memory | ||
| range. | ||
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| - #size-cells: Must be set to 1. | ||
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| - ranges: Encodes CS to memory region association. | ||
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| - clocks: Clock feeding the EBI controller. | ||
| See clock-bindings.txt | ||
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| Children device nodes are representing device connected to the EBI bus. | ||
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| Required device node properties: | ||
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| - reg: Contains the chip-select id, the offset and the length | ||
| of the memory region requested by the device. | ||
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| EBI bus configuration will be defined directly in the device subnode. | ||
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| Optional EBI/SMC properties: | ||
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| - atmel,smc-bus-width: width of the asynchronous device's data bus | ||
| 8, 16 or 32. | ||
| Default to 8 when undefined. | ||
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| - atmel,smc-byte-access-type "write" or "select" (see Atmel datasheet). | ||
| Default to "select" when undefined. | ||
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| - atmel,smc-read-mode "nrd" or "ncs". | ||
| Default to "ncs" when undefined. | ||
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| - atmel,smc-write-mode "nwe" or "ncs". | ||
| Default to "ncs" when undefined. | ||
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| - atmel,smc-exnw-mode "disabled", "frozen" or "ready". | ||
| Default to "disabled" when undefined. | ||
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| - atmel,smc-page-mode enable page mode if present. The provided value | ||
| defines the page size (supported values: 4, 8, | ||
| 16 and 32). | ||
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| - atmel,smc-tdf-mode: "normal" or "optimized". When set to | ||
| "optimized" the data float time is optimized | ||
| depending on the next device being accessed | ||
| (next device setup time is subtracted to the | ||
| current device data float time). | ||
| Default to "normal" when undefined. | ||
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| If at least one atmel,smc- property is defined the following SMC timing | ||
| properties become mandatory. In the other hand, if none of the atmel,smc- | ||
| properties are specified, we assume that the EBI bus configuration will be | ||
| handled by the sub-device driver, and none of those properties should be | ||
| defined. | ||
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| All the timings are expressed in nanoseconds (see Atmel datasheet for a full | ||
| description). | ||
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| - atmel,smc-ncs-rd-setup-ns | ||
| - atmel,smc-nrd-setup-ns | ||
| - atmel,smc-ncs-wr-setup-ns | ||
| - atmel,smc-nwe-setup-ns | ||
| - atmel,smc-ncs-rd-pulse-ns | ||
| - atmel,smc-nrd-pulse-ns | ||
| - atmel,smc-ncs-wr-pulse-ns | ||
| - atmel,smc-nwe-pulse-ns | ||
| - atmel,smc-nwe-cycle-ns | ||
| - atmel,smc-nrd-cycle-ns | ||
| - atmel,smc-tdf-ns | ||
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| Example: | ||
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| ebi: ebi@10000000 { | ||
| compatible = "atmel,sama5d3-ebi"; | ||
| #address-cells = <2>; | ||
| #size-cells = <1>; | ||
| atmel,smc = <&hsmc>; | ||
| atmel,matrix = <&matrix>; | ||
| reg = <0x10000000 0x10000000 | ||
| 0x40000000 0x30000000>; | ||
| ranges = <0x0 0x0 0x10000000 0x10000000 | ||
| 0x1 0x0 0x40000000 0x10000000 | ||
| 0x2 0x0 0x50000000 0x10000000 | ||
| 0x3 0x0 0x60000000 0x10000000>; | ||
| clocks = <&mck>; | ||
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| pinctrl-names = "default"; | ||
| pinctrl-0 = <&pinctrl_ebi_addr>; | ||
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| nor: flash@0,0 { | ||
| compatible = "cfi-flash"; | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
| reg = <0x0 0x0 0x1000000>; | ||
| bank-width = <2>; | ||
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| atmel,smc-read-mode = "nrd"; | ||
| atmel,smc-write-mode = "nwe"; | ||
| atmel,smc-bus-width = <16>; | ||
| atmel,smc-ncs-rd-setup-ns = <0>; | ||
| atmel,smc-ncs-wr-setup-ns = <0>; | ||
| atmel,smc-nwe-setup-ns = <8>; | ||
| atmel,smc-nrd-setup-ns = <16>; | ||
| atmel,smc-ncs-rd-pulse-ns = <84>; | ||
| atmel,smc-ncs-wr-pulse-ns = <84>; | ||
| atmel,smc-nrd-pulse-ns = <76>; | ||
| atmel,smc-nwe-pulse-ns = <76>; | ||
| atmel,smc-nrd-cycle-ns = <107>; | ||
| atmel,smc-nwe-cycle-ns = <84>; | ||
| atmel,smc-tdf-ns = <16>; | ||
| }; | ||
| }; | ||
|
|
5 changes: 2 additions & 3 deletions
5
Documentation/devicetree/bindings/pwm/cirrus,clps711x-pwm.txt
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18 changes: 18 additions & 0 deletions
18
Documentation/devicetree/bindings/reset/amlogic,meson-reset.txt
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| Amlogic Meson SoC Reset Controller | ||
| ======================================= | ||
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| Please also refer to reset.txt in this directory for common reset | ||
| controller binding usage. | ||
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| Required properties: | ||
| - compatible: Should be "amlogic,meson8b-reset" or "amlogic,meson-gxbb-reset" | ||
| - reg: should contain the register address base | ||
| - #reset-cells: 1, see below | ||
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| example: | ||
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| reset: reset-controller { | ||
| compatible = "amlogic,meson-gxbb-reset"; | ||
| reg = <0x0 0x04404 0x0 0x20>; | ||
| #reset-cells = <1>; | ||
| }; |
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