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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull more kvm updates from Paolo Bonzini:
"This includes the 6.4 changes for RISC-V, and a few bugfix patches for
other architectures. For x86, this closes a longstanding performance
issue in the newer and (usually) more scalable page table management
code.
RISC-V:
- ONE_REG interface to enable/disable SBI extensions
- Zbb extension for Guest/VM
- AIA CSR virtualization
x86:
- Fix a long-standing TDP MMU flaw, where unloading roots on a vCPU
can result in the root being freed even though the root is
completely valid and can be reused as-is (with a TLB flush).
s390:
- A couple of bugfixes"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: s390: fix race in gmap_make_secure()
KVM: s390: pv: fix asynchronous teardown for small VMs
KVM: x86: Preserve TDP MMU roots until they are explicitly invalidated
RISC-V: KVM: Virtualize per-HART AIA CSRs
RISC-V: KVM: Use bitmap for irqs_pending and irqs_pending_mask
RISC-V: KVM: Add ONE_REG interface for AIA CSRs
RISC-V: KVM: Implement subtype for CSR ONE_REG interface
RISC-V: KVM: Initial skeletal support for AIA
RISC-V: KVM: Drop the _MASK suffix from hgatp.VMID mask defines
RISC-V: Detect AIA CSRs from ISA string
RISC-V: Add AIA related CSR defines
RISC-V: KVM: Allow Zbb extension for Guest/VM
RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions
RISC-V: KVM: Alphabetize selects
KVM: RISC-V: Retry fault if vma_lookup() results become invalid- Loading branch information
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,127 @@ | ||
| /* SPDX-License-Identifier: GPL-2.0-only */ | ||
| /* | ||
| * Copyright (C) 2021 Western Digital Corporation or its affiliates. | ||
| * Copyright (C) 2022 Ventana Micro Systems Inc. | ||
| * | ||
| * Authors: | ||
| * Anup Patel <[email protected]> | ||
| */ | ||
|
|
||
| #ifndef __KVM_RISCV_AIA_H | ||
| #define __KVM_RISCV_AIA_H | ||
|
|
||
| #include <linux/jump_label.h> | ||
| #include <linux/kvm_types.h> | ||
| #include <asm/csr.h> | ||
|
|
||
| struct kvm_aia { | ||
| /* In-kernel irqchip created */ | ||
| bool in_kernel; | ||
|
|
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| /* In-kernel irqchip initialized */ | ||
| bool initialized; | ||
| }; | ||
|
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| struct kvm_vcpu_aia_csr { | ||
| unsigned long vsiselect; | ||
| unsigned long hviprio1; | ||
| unsigned long hviprio2; | ||
| unsigned long vsieh; | ||
| unsigned long hviph; | ||
| unsigned long hviprio1h; | ||
| unsigned long hviprio2h; | ||
| }; | ||
|
|
||
| struct kvm_vcpu_aia { | ||
| /* CPU AIA CSR context of Guest VCPU */ | ||
| struct kvm_vcpu_aia_csr guest_csr; | ||
|
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| /* CPU AIA CSR context upon Guest VCPU reset */ | ||
| struct kvm_vcpu_aia_csr guest_reset_csr; | ||
| }; | ||
|
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||
| #define kvm_riscv_aia_initialized(k) ((k)->arch.aia.initialized) | ||
|
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| #define irqchip_in_kernel(k) ((k)->arch.aia.in_kernel) | ||
|
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| DECLARE_STATIC_KEY_FALSE(kvm_riscv_aia_available); | ||
| #define kvm_riscv_aia_available() \ | ||
| static_branch_unlikely(&kvm_riscv_aia_available) | ||
|
|
||
| #define KVM_RISCV_AIA_IMSIC_TOPEI (ISELECT_MASK + 1) | ||
| static inline int kvm_riscv_vcpu_aia_imsic_rmw(struct kvm_vcpu *vcpu, | ||
| unsigned long isel, | ||
| unsigned long *val, | ||
| unsigned long new_val, | ||
| unsigned long wr_mask) | ||
| { | ||
| return 0; | ||
| } | ||
|
|
||
| #ifdef CONFIG_32BIT | ||
| void kvm_riscv_vcpu_aia_flush_interrupts(struct kvm_vcpu *vcpu); | ||
| void kvm_riscv_vcpu_aia_sync_interrupts(struct kvm_vcpu *vcpu); | ||
| #else | ||
| static inline void kvm_riscv_vcpu_aia_flush_interrupts(struct kvm_vcpu *vcpu) | ||
| { | ||
| } | ||
| static inline void kvm_riscv_vcpu_aia_sync_interrupts(struct kvm_vcpu *vcpu) | ||
| { | ||
| } | ||
| #endif | ||
| bool kvm_riscv_vcpu_aia_has_interrupts(struct kvm_vcpu *vcpu, u64 mask); | ||
|
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||
| void kvm_riscv_vcpu_aia_update_hvip(struct kvm_vcpu *vcpu); | ||
| void kvm_riscv_vcpu_aia_load(struct kvm_vcpu *vcpu, int cpu); | ||
| void kvm_riscv_vcpu_aia_put(struct kvm_vcpu *vcpu); | ||
| int kvm_riscv_vcpu_aia_get_csr(struct kvm_vcpu *vcpu, | ||
| unsigned long reg_num, | ||
| unsigned long *out_val); | ||
| int kvm_riscv_vcpu_aia_set_csr(struct kvm_vcpu *vcpu, | ||
| unsigned long reg_num, | ||
| unsigned long val); | ||
|
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| int kvm_riscv_vcpu_aia_rmw_topei(struct kvm_vcpu *vcpu, | ||
| unsigned int csr_num, | ||
| unsigned long *val, | ||
| unsigned long new_val, | ||
| unsigned long wr_mask); | ||
| int kvm_riscv_vcpu_aia_rmw_ireg(struct kvm_vcpu *vcpu, unsigned int csr_num, | ||
| unsigned long *val, unsigned long new_val, | ||
| unsigned long wr_mask); | ||
| #define KVM_RISCV_VCPU_AIA_CSR_FUNCS \ | ||
| { .base = CSR_SIREG, .count = 1, .func = kvm_riscv_vcpu_aia_rmw_ireg }, \ | ||
| { .base = CSR_STOPEI, .count = 1, .func = kvm_riscv_vcpu_aia_rmw_topei }, | ||
|
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| static inline int kvm_riscv_vcpu_aia_update(struct kvm_vcpu *vcpu) | ||
| { | ||
| return 1; | ||
| } | ||
|
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| static inline void kvm_riscv_vcpu_aia_reset(struct kvm_vcpu *vcpu) | ||
| { | ||
| } | ||
|
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| static inline int kvm_riscv_vcpu_aia_init(struct kvm_vcpu *vcpu) | ||
| { | ||
| return 0; | ||
| } | ||
|
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| static inline void kvm_riscv_vcpu_aia_deinit(struct kvm_vcpu *vcpu) | ||
| { | ||
| } | ||
|
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| static inline void kvm_riscv_aia_init_vm(struct kvm *kvm) | ||
| { | ||
| } | ||
|
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| static inline void kvm_riscv_aia_destroy_vm(struct kvm *kvm) | ||
| { | ||
| } | ||
|
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| void kvm_riscv_aia_enable(void); | ||
| void kvm_riscv_aia_disable(void); | ||
| int kvm_riscv_aia_init(void); | ||
| void kvm_riscv_aia_exit(void); | ||
|
|
||
| #endif |
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