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igc: Remove obsolete DMA coalescing code
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DMA coalescing is not applicable for i225 parts. This patch comes to tidy
up the driver code.

Signed-off-by: Sasha Neftin <[email protected]>
Tested-by: Naama Meir <[email protected]>
Signed-off-by: Tony Nguyen <[email protected]>
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aneftin authored and anguy11 committed Mar 21, 2023
1 parent 5a9b7bf commit 65364bb
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Showing 3 changed files with 5 additions and 18 deletions.
3 changes: 0 additions & 3 deletions drivers/net/ethernet/intel/igc/igc_defines.h
Original file line number Diff line number Diff line change
Expand Up @@ -662,9 +662,6 @@
*/
#define IGC_TW_SYSTEM_100_MASK 0x0000FF00
#define IGC_TW_SYSTEM_100_SHIFT 8
#define IGC_DMACR_DMAC_EN 0x80000000 /* Enable DMA Coalescing */
#define IGC_DMACR_DMACTHR_MASK 0x00FF0000
#define IGC_DMACR_DMACTHR_SHIFT 16
/* Reg val to set scale to 1024 nsec */
#define IGC_LTRMINV_SCALE_1024 2
/* Reg val to set scale to 32768 nsec */
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19 changes: 5 additions & 14 deletions drivers/net/ethernet/intel/igc/igc_i225.c
Original file line number Diff line number Diff line change
Expand Up @@ -593,20 +593,11 @@ s32 igc_set_ltr_i225(struct igc_hw *hw, bool link)
size = rd32(IGC_RXPBS) &
IGC_RXPBS_SIZE_I225_MASK;

/* Calculations vary based on DMAC settings. */
if (rd32(IGC_DMACR) & IGC_DMACR_DMAC_EN) {
size -= (rd32(IGC_DMACR) &
IGC_DMACR_DMACTHR_MASK) >>
IGC_DMACR_DMACTHR_SHIFT;
/* Convert size to bits. */
size *= 1024 * 8;
} else {
/* Convert size to bytes, subtract the MTU, and then
* convert the size to bits.
*/
size *= 1024;
size *= 8;
}
/* Convert size to bytes, subtract the MTU, and then
* convert the size to bits.
*/
size *= 1024;
size *= 8;

if (size < 0) {
hw_dbg("Invalid effective Rx buffer size %d\n",
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1 change: 0 additions & 1 deletion drivers/net/ethernet/intel/igc/igc_regs.h
Original file line number Diff line number Diff line change
Expand Up @@ -292,7 +292,6 @@

/* LTR registers */
#define IGC_LTRC 0x01A0 /* Latency Tolerance Reporting Control */
#define IGC_DMACR 0x02508 /* DMA Coalescing Control Register */
#define IGC_LTRMINV 0x5BB0 /* LTR Minimum Value */
#define IGC_LTRMAXV 0x5BB4 /* LTR Maximum Value */

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