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Merge tag 'pwm/for-5.3-rc1' of git://git.kernel.org/pub/scm/linux/ker…
…nel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This set of changes contains a new driver for SiFive SoCs as well as enhancements to the core (device links are used to track dependencies between PWM providers and consumers, support for PWM controllers via ACPI, sysfs will now suspend/resume PWMs that it has claimed) and various existing drivers" * tag 'pwm/for-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (37 commits) pwm: fsl-ftm: Make sure to unlock mutex on failure pwm: fsl-ftm: Use write protection for prescaler & polarity pwm: fsl-ftm: More relaxed permissions for updating period pwm: atmel-hlcdc: Add compatible for SAM9X60 HLCDC's PWM pwm: bcm2835: Improve precision of PWM leds: pwm: Support ACPI via firmware-node framework pwm: Add support referencing PWMs from ACPI pwm: rcar: Remove suspend/resume support pwm: sysfs: Add suspend/resume support pwm: Add power management descriptions pwm: meson: Add documentation to the driver pwm: meson: Add support PWM_POLARITY_INVERSED when disabling pwm: meson: Don't cache struct pwm_state internally pwm: meson: Read the full hardware state in meson_pwm_get_state() pwm: meson: Simplify the calculation of the pre-divider and count pwm: meson: Move pwm_set_chip_data() to meson_pwm_request() pwm: meson: Add the per-channel register offsets and bits in a struct pwm: meson: Add the meson_pwm_channel data to struct meson_pwm pwm: meson: Pass struct pwm_device to meson_pwm_calc() pwm: meson: Don't duplicate the polarity internally ...
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SiFive PWM controller | ||
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Unlike most other PWM controllers, the SiFive PWM controller currently only | ||
supports one period for all channels in the PWM. All PWMs need to run at | ||
the same period. The period also has significant restrictions on the values | ||
it can achieve, which the driver rounds to the nearest achievable period. | ||
PWM RTL that corresponds to the IP block version numbers can be found | ||
here: | ||
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https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm | ||
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Required properties: | ||
- compatible: Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". | ||
Supported compatible strings are: "sifive,fu540-c000-pwm" for the SiFive | ||
PWM v0 as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the | ||
SiFive PWM v0 IP block with no chip integration tweaks. | ||
Please refer to sifive-blocks-ip-versioning.txt for details. | ||
- reg: physical base address and length of the controller's registers | ||
- clocks: Should contain a clock identifier for the PWM's parent clock. | ||
- #pwm-cells: Should be 3. See pwm.txt in this directory | ||
for a description of the cell format. | ||
- interrupts: one interrupt per PWM channel | ||
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Examples: | ||
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pwm: pwm@10020000 { | ||
compatible = "sifive,fu540-c000-pwm", "sifive,pwm0"; | ||
reg = <0x0 0x10020000 0x0 0x1000>; | ||
clocks = <&tlclk>; | ||
interrupt-parent = <&plic>; | ||
interrupts = <42 43 44 45>; | ||
#pwm-cells = <3>; | ||
}; |
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