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drm/amd/display: Refactor ABM feature
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[Why]
Refactor ABM feature and implement inbox command for DMUB.

[How]
Implement the ioctl to send inbox command to DMUB.

Reviewed-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Leon Huang <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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@alexdeucher
Leon Huang authored and alexdeucher committed Apr 18, 2023
1 parent 0c1f033 commit b8fe563
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Showing 5 changed files with 442 additions and 162 deletions.
2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/display/dc/dce/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
DCE = dce_audio.o dce_stream_encoder.o dce_link_encoder.o dce_hwseq.o \
dce_mem_input.o dce_clock_source.o dce_scl_filters.o dce_transform.o \
dce_opp.o dce_dmcu.o dce_abm.o dce_ipp.o dce_aux.o \
dce_i2c.o dce_i2c_hw.o dce_i2c_sw.o dmub_psr.o dmub_abm.o dce_panel_cntl.o \
dce_i2c.o dce_i2c_hw.o dce_i2c_sw.o dmub_psr.o dmub_abm.o dmub_abm_lcd.o dce_panel_cntl.o \
dmub_hw_lock_mgr.o dmub_outbox.o

AMD_DAL_DCE = $(addprefix $(AMDDALPATH)/dc/dce/,$(DCE))
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264 changes: 103 additions & 161 deletions drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c
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Original file line number Diff line number Diff line change
Expand Up @@ -24,212 +24,151 @@
*/

#include "dmub_abm.h"
#include "dce_abm.h"
#include "dmub_abm_lcd.h"
#include "dc.h"
#include "dc_dmub_srv.h"
#include "dmub/dmub_srv.h"
#include "core_types.h"
#include "dm_services.h"
#include "reg_helper.h"
#include "fixed31_32.h"

#include "atom.h"

#define TO_DMUB_ABM(abm)\
container_of(abm, struct dce_abm, base)

#define REG(reg) \
(dce_abm->regs->reg)
#define ABM_FEATURE_NO_SUPPORT 0
#define ABM_LCD_SUPPORT 1

#undef FN
#define FN(reg_name, field_name) \
dce_abm->abm_shift->field_name, dce_abm->abm_mask->field_name
static unsigned int abm_feature_support(struct abm *abm, unsigned int panel_inst)
{
struct dc_context *dc = abm->ctx;
struct dc_link *edp_links[MAX_NUM_EDP];
int i;
int edp_num;
unsigned int ret = ABM_FEATURE_NO_SUPPORT;

#define CTX \
dce_abm->base.ctx
dc_get_edp_links(dc->dc, edp_links, &edp_num);

#define DISABLE_ABM_IMMEDIATELY 255
for (i = 0; i < edp_num; i++) {
if (panel_inst == i)
break;
}

if (i < edp_num) {
ret = ABM_LCD_SUPPORT;
}

return ret;
}

static void dmub_abm_enable_fractional_pwm(struct dc_context *dc)
static void dmub_abm_init_ex(struct abm *abm, uint32_t backlight)
{
union dmub_rb_cmd cmd;
uint32_t fractional_pwm = (dc->dc->config.disable_fractional_pwm == false) ? 1 : 0;
uint32_t edp_id_count = dc->dc_edp_id_count;
int i;
uint8_t panel_mask = 0;

for (i = 0; i < edp_id_count; i++)
panel_mask |= 0x01 << i;

memset(&cmd, 0, sizeof(cmd));
cmd.abm_set_pwm_frac.header.type = DMUB_CMD__ABM;
cmd.abm_set_pwm_frac.header.sub_type = DMUB_CMD__ABM_SET_PWM_FRAC;
cmd.abm_set_pwm_frac.abm_set_pwm_frac_data.fractional_pwm = fractional_pwm;
cmd.abm_set_pwm_frac.abm_set_pwm_frac_data.version = DMUB_CMD_ABM_CONTROL_VERSION_1;
cmd.abm_set_pwm_frac.abm_set_pwm_frac_data.panel_mask = panel_mask;
cmd.abm_set_pwm_frac.header.payload_bytes = sizeof(struct dmub_cmd_abm_set_pwm_frac_data);

dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
dc_dmub_srv_cmd_execute(dc->dmub_srv);
dc_dmub_srv_wait_idle(dc->dmub_srv);
dmub_abm_init(abm, backlight);
}

static void dmub_abm_init(struct abm *abm, uint32_t backlight)
static unsigned int dmub_abm_get_current_backlight_ex(struct abm *abm)
{
struct dce_abm *dce_abm = TO_DMUB_ABM(abm);

REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x3);
REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x1);
REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x3);
REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x1);
REG_WRITE(BL1_PWM_BL_UPDATE_SAMPLE_RATE, 0x1);

REG_SET_3(DC_ABM1_HG_MISC_CTRL, 0,
ABM1_HG_NUM_OF_BINS_SEL, 0,
ABM1_HG_VMAX_SEL, 1,
ABM1_HG_BIN_BITWIDTH_SIZE_SEL, 0);

REG_SET_3(DC_ABM1_IPCSC_COEFF_SEL, 0,
ABM1_IPCSC_COEFF_SEL_R, 2,
ABM1_IPCSC_COEFF_SEL_G, 4,
ABM1_IPCSC_COEFF_SEL_B, 2);
return dmub_abm_get_current_backlight(abm);
}

REG_UPDATE(BL1_PWM_CURRENT_ABM_LEVEL,
BL1_PWM_CURRENT_ABM_LEVEL, backlight);
static unsigned int dmub_abm_get_target_backlight_ex(struct abm *abm)
{
return dmub_abm_get_target_backlight(abm);
}

REG_UPDATE(BL1_PWM_TARGET_ABM_LEVEL,
BL1_PWM_TARGET_ABM_LEVEL, backlight);
static bool dmub_abm_set_level_ex(struct abm *abm, uint32_t level)
{
bool ret = false;
unsigned int feature_support, i;
uint8_t panel_mask0 = 0;

REG_UPDATE(BL1_PWM_USER_LEVEL,
BL1_PWM_USER_LEVEL, backlight);
for (i = 0; i < MAX_NUM_EDP; i++) {
feature_support = abm_feature_support(abm, i);

REG_UPDATE_2(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES,
ABM1_LS_MIN_PIXEL_VALUE_THRES, 0,
ABM1_LS_MAX_PIXEL_VALUE_THRES, 1000);
if (feature_support == ABM_LCD_SUPPORT)
panel_mask0 |= (0x01 << i);
}

REG_SET_3(DC_ABM1_HGLS_REG_READ_PROGRESS, 0,
ABM1_HG_REG_READ_MISSED_FRAME_CLEAR, 1,
ABM1_LS_REG_READ_MISSED_FRAME_CLEAR, 1,
ABM1_BL_REG_READ_MISSED_FRAME_CLEAR, 1);
if (panel_mask0)
ret = dmub_abm_set_level(abm, level, panel_mask0);

dmub_abm_enable_fractional_pwm(abm->ctx);
return ret;
}

static unsigned int dmub_abm_get_current_backlight(struct abm *abm)
static bool dmub_abm_init_config_ex(struct abm *abm,
const char *src,
unsigned int bytes,
unsigned int inst)
{
struct dce_abm *dce_abm = TO_DMUB_ABM(abm);
unsigned int backlight = REG_READ(BL1_PWM_CURRENT_ABM_LEVEL);
unsigned int feature_support;

/* return backlight in hardware format which is unsigned 17 bits, with
* 1 bit integer and 16 bit fractional
*/
return backlight;
}
feature_support = abm_feature_support(abm, inst);

static unsigned int dmub_abm_get_target_backlight(struct abm *abm)
{
struct dce_abm *dce_abm = TO_DMUB_ABM(abm);
unsigned int backlight = REG_READ(BL1_PWM_TARGET_ABM_LEVEL);
if (feature_support == ABM_LCD_SUPPORT)
dmub_abm_init_config(abm, src, bytes, inst);

/* return backlight in hardware format which is unsigned 17 bits, with
* 1 bit integer and 16 bit fractional
*/
return backlight;
return true;
}

static bool dmub_abm_set_level(struct abm *abm, uint32_t level)
static bool dmub_abm_set_pause_ex(struct abm *abm, bool pause, unsigned int panel_inst, unsigned int stream_inst)
{
union dmub_rb_cmd cmd;
struct dc_context *dc = abm->ctx;
struct dc_link *edp_links[MAX_NUM_EDP];
int i;
int edp_num;
uint8_t panel_mask = 0;
bool ret = false;
unsigned int feature_support;

dc_get_edp_links(dc->dc, edp_links, &edp_num);

for (i = 0; i < edp_num; i++) {
if (edp_links[i]->link_status.link_active)
panel_mask |= (0x01 << i);
}

memset(&cmd, 0, sizeof(cmd));
cmd.abm_set_level.header.type = DMUB_CMD__ABM;
cmd.abm_set_level.header.sub_type = DMUB_CMD__ABM_SET_LEVEL;
cmd.abm_set_level.abm_set_level_data.level = level;
cmd.abm_set_level.abm_set_level_data.version = DMUB_CMD_ABM_CONTROL_VERSION_1;
cmd.abm_set_level.abm_set_level_data.panel_mask = panel_mask;
cmd.abm_set_level.header.payload_bytes = sizeof(struct dmub_cmd_abm_set_level_data);
feature_support = abm_feature_support(abm, panel_inst);

dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
dc_dmub_srv_cmd_execute(dc->dmub_srv);
dc_dmub_srv_wait_idle(dc->dmub_srv);
if (feature_support == ABM_LCD_SUPPORT)
ret = dmub_abm_set_pause(abm, pause, panel_inst, stream_inst);

return true;
return ret;
}

static bool dmub_abm_init_config(struct abm *abm,
const char *src,
unsigned int bytes,
unsigned int inst)
static bool dmub_abm_set_pipe_ex(struct abm *abm, uint32_t otg_inst, uint32_t option, uint32_t panel_inst)
{
union dmub_rb_cmd cmd;
struct dc_context *dc = abm->ctx;
uint8_t panel_mask = 0x01 << inst;
bool ret = false;
unsigned int feature_support;

// TODO: Optimize by only reading back final 4 bytes
dmub_flush_buffer_mem(&dc->dmub_srv->dmub->scratch_mem_fb);
feature_support = abm_feature_support(abm, panel_inst);

// Copy iramtable into cw7
memcpy(dc->dmub_srv->dmub->scratch_mem_fb.cpu_addr, (void *)src, bytes);
if (feature_support == ABM_LCD_SUPPORT)
ret = dmub_abm_set_pipe(abm, otg_inst, option, panel_inst);

memset(&cmd, 0, sizeof(cmd));
// Fw will copy from cw7 to fw_state
cmd.abm_init_config.header.type = DMUB_CMD__ABM;
cmd.abm_init_config.header.sub_type = DMUB_CMD__ABM_INIT_CONFIG;
cmd.abm_init_config.abm_init_config_data.src.quad_part = dc->dmub_srv->dmub->scratch_mem_fb.gpu_addr;
cmd.abm_init_config.abm_init_config_data.bytes = bytes;
cmd.abm_init_config.abm_init_config_data.version = DMUB_CMD_ABM_CONTROL_VERSION_1;
cmd.abm_init_config.abm_init_config_data.panel_mask = panel_mask;
return ret;
}

cmd.abm_init_config.header.payload_bytes = sizeof(struct dmub_cmd_abm_init_config_data);
static bool dmub_abm_set_event_ex(struct abm *abm, unsigned int full_screen, unsigned int video_mode,
unsigned int hdr_mode, unsigned int panel_inst)
{
bool ret = false;
unsigned int feature_support;

dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
dc_dmub_srv_cmd_execute(dc->dmub_srv);
dc_dmub_srv_wait_idle(dc->dmub_srv);
feature_support = abm_feature_support(abm, panel_inst);

return true;
return ret;
}

static bool dmub_abm_set_pause(struct abm *abm, bool pause, unsigned int panel_inst, unsigned int stream_inst)
static bool dmub_abm_set_backlight_level_pwm_ex(struct abm *abm,
unsigned int backlight_pwm_u16_16,
unsigned int frame_ramp,
unsigned int controller_id,
unsigned int panel_inst)
{
union dmub_rb_cmd cmd;
struct dc_context *dc = abm->ctx;
uint8_t panel_mask = 0x01 << panel_inst;
bool ret = false;
unsigned int feature_support;

memset(&cmd, 0, sizeof(cmd));
cmd.abm_pause.header.type = DMUB_CMD__ABM;
cmd.abm_pause.header.sub_type = DMUB_CMD__ABM_PAUSE;
cmd.abm_pause.abm_pause_data.enable = pause;
cmd.abm_pause.abm_pause_data.panel_mask = panel_mask;
cmd.abm_set_level.header.payload_bytes = sizeof(struct dmub_cmd_abm_pause_data);
feature_support = abm_feature_support(abm, panel_inst);

dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
dc_dmub_srv_cmd_execute(dc->dmub_srv);
dc_dmub_srv_wait_idle(dc->dmub_srv);
if (feature_support == ABM_LCD_SUPPORT)
ret = dmub_abm_set_backlight_level(abm, backlight_pwm_u16_16, frame_ramp, panel_inst);

return true;
return ret;
}

static const struct abm_funcs abm_funcs = {
.abm_init = dmub_abm_init,
.set_abm_level = dmub_abm_set_level,
.get_current_backlight = dmub_abm_get_current_backlight,
.get_target_backlight = dmub_abm_get_target_backlight,
.init_abm_config = dmub_abm_init_config,
.set_abm_pause = dmub_abm_set_pause,
.abm_init = dmub_abm_init_ex,
.set_abm_level = dmub_abm_set_level_ex,
.get_current_backlight = dmub_abm_get_current_backlight_ex,
.get_target_backlight = dmub_abm_get_target_backlight_ex,
.init_abm_config = dmub_abm_init_config_ex,
.set_abm_pause = dmub_abm_set_pause_ex,
.set_pipe_ex = dmub_abm_set_pipe_ex,
.set_abm_event = dmub_abm_set_event_ex,
.set_backlight_level_pwm = dmub_abm_set_backlight_level_pwm_ex,
};

static void dmub_abm_construct(
Expand All @@ -256,16 +195,19 @@ struct abm *dmub_abm_create(
const struct dce_abm_shift *abm_shift,
const struct dce_abm_mask *abm_mask)
{
struct dce_abm *abm_dce = kzalloc(sizeof(*abm_dce), GFP_KERNEL);
if (ctx->dc->caps.dmcub_support) {
struct dce_abm *abm_dce = kzalloc(sizeof(*abm_dce), GFP_KERNEL);

if (abm_dce == NULL) {
BREAK_TO_DEBUGGER();
return NULL;
}
if (abm_dce == NULL) {
BREAK_TO_DEBUGGER();
return NULL;
}

dmub_abm_construct(abm_dce, ctx, regs, abm_shift, abm_mask);
dmub_abm_construct(abm_dce, ctx, regs, abm_shift, abm_mask);

return &abm_dce->base;
return &abm_dce->base;
}
return NULL;
}

void dmub_abm_destroy(struct abm **abm)
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