LF-12988 fix(imx91): Save/restore m33 root clock in wakeupmix on/off

iMX91 missed save/restore m33 root clock in suspend/resume.
When wakeupmix is power down, this clock needs switch to 24Mhz for
the SSI between AON and wakeup.
Previously the M33 root clock is not configured and use default
24Mhz, but with SPL set the clock to 200Mhz, suspend/resume meets
issue without save/restore.

Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Jacky Bai <[email protected]>

plat/imx/imx91/imx91_psci.c

@@ -59,6 +59,7 @@
 	{.base = (addr), .pin_num = (num), }
 
 enum ccm_clock_root {
+	M33_ROOT = 3,
 	WAKEUP_AXI_ROOT = 7,
 	CAN1_ROOT = 23,
 	CAN2_ROOT = 24,
@@ -532,6 +533,9 @@ void wakeupmix_pwr_down(void)
 	wdog_save(WDOG5_BASE, 2);
 	gpio_save(wakeupmix_gpio_ctx, 3);
 	if (!(gpio_wakeup || has_wakeup_irq)) {
+		clock_root[0] = mmio_read_32(CCM_ROOT_SLICE(M33_ROOT));
+		mmio_clrbits_32(CCM_ROOT_SLICE(M33_ROOT), ROOT_MUX_MASK);
+
 		/* wakeup mix controlled by A55 cluster power down: domain3 only */
 		src_mix_set_lpm(SRC_WKUP, 0x3, CM_MODE_WAIT);
 		src_authen_config(SRC_WKUP, 0x8, 0x1);
@@ -545,6 +549,7 @@ void wakeupmix_pwr_down(void)
 void wakeupmix_pwr_up(void)
 {
 	if (!(gpio_wakeup || has_wakeup_irq)) {
+		mmio_setbits_32(CCM_ROOT_SLICE(M33_ROOT), clock_root[0] & ROOT_MUX_MASK);
 		/* keep wakeupmix on when exit from system suspend */
 		src_mix_set_lpm(SRC_WKUP, 0x3, CM_MODE_SUSPEND);
 		mmio_clrbits_32(SRC_BASE + 0xc00 + 0x4, BIT(2));