feat: add avr registers (bergercookie#206)

README.md

@@ -237,6 +237,8 @@ git repository.
 
 - AVR assembler documentation sourced from the [AVR documentation](https://ww1.microchip.com/downloads/en/DeviceDoc/40001917A.pdf)
 
+- AVR register documentation sourced from the [AVR documentation](https://developerhelp.microchip.com/xwiki/bin/view/products/mcu-mpu/8-bit-avr/structure/gpr/)
+
 <details><summary>* Licensed under Apache 2.0</summary><p>
 
 ```

asm-lsp/config_builder.rs

@@ -10,7 +10,7 @@ use crate::types::{Arch, Assembler, Config, ConfigOptions, ProjectConfig, RootCo
 
 use dialoguer::{theme::ColorfulTheme, Confirm, FuzzySelect, Input};
 
-const ARCH_LIST: [Arch; 9] = [
+const ARCH_LIST: [Arch; 10] = [
     Arch::X86,
     Arch::X86_64,
     Arch::X86_AND_X86_64,
@@ -20,6 +20,7 @@ const ARCH_LIST: [Arch; 9] = [
     Arch::Z80,
     Arch::MOS6502,
     Arch::PowerISA,
+    Arch::Avr,
 ];
 
 const ASSEMBLER_LIST: [Assembler; 6] = [

asm-lsp/test.rs

@@ -42,6 +42,16 @@ mod tests {
         }
     }
 
+    fn avr_arch_test_config() -> Config {
+        Config {
+            version: None,
+            assembler: Assembler::None,
+            instruction_set: Arch::Avr,
+            opts: Some(ConfigOptions::default()),
+            client: None,
+        }
+    }
+
     fn avr_assembler_test_config() -> Config {
         Config {
             version: None,
@@ -175,6 +185,7 @@ mod tests {
         z80_registers: Vec<Register>,
         mos6502_registers: Vec<Register>,
         power_isa_registers: Vec<Register>,
+        avr_registers: Vec<Register>,
         gas_directives: Vec<Directive>,
         masm_directives: Vec<Directive>,
         nasm_directives: Vec<Directive>,
@@ -194,13 +205,14 @@ mod tests {
                 arm64_instructions: Vec::new(),
                 arm64_registers: Vec::new(),
                 riscv_instructions: Vec::new(),
-                mos6502_instructions: Vec::new(),
-                power_isa_instructions: Vec::new(),
                 riscv_registers: Vec::new(),
+                power_isa_instructions: Vec::new(),
+                power_isa_registers: Vec::new(),
                 z80_instructions: Vec::new(),
                 z80_registers: Vec::new(),
+                mos6502_instructions: Vec::new(),
                 mos6502_registers: Vec::new(),
-                power_isa_registers: Vec::new(),
+                avr_registers: Vec::new(),
                 gas_directives: Vec::new(),
                 masm_directives: Vec::new(),
                 nasm_directives: Vec::new(),
@@ -339,6 +351,13 @@ mod tests {
             Vec::new()
         };
 
+        info.avr_registers = if config.is_isa_enabled(Arch::Avr) {
+            let regs_avr = include_bytes!("serialized/registers/avr");
+            bincode::deserialize(regs_avr)?
+        } else {
+            Vec::new()
+        };
+
         info.gas_directives = if config.is_assembler_enabled(Assembler::Gas) {
             let gas_dirs = include_bytes!("serialized/directives/gas");
             bincode::deserialize(gas_dirs)?
@@ -476,6 +495,12 @@ mod tests {
             &mut store.names_to_info.registers,
         );
 
+        populate_name_to_register_map(
+            Arch::Avr,
+            &info.avr_registers,
+            &mut store.names_to_info.registers,
+        );
+
         populate_name_to_directive_map(
             Assembler::Gas,
             &info.gas_directives,
@@ -753,6 +778,69 @@ mod tests {
      * AVR Tests
      *************************************************************************/
     #[test]
+    fn handle_hover_avr_arch_it_provides_reg_info_1() {
+        test_hover(
+            "ldi     r1<cursor>6,0xC0",
+            "R16 [avr]
+General purpose register 16. Mapped to address 0x10.
+
+Type: General Purpose Register
+Width: 8 bits",
+            &avr_arch_test_config(),
+        );
+    }
+    #[test]
+    fn handle_hover_avr_arch_it_provides_reg_info_2() {
+        test_hover(
+            "clr r<cursor>17",
+            "R17 [avr]
+General purpose register 17. Mapped to address 0x11.
+
+Type: General Purpose Register
+Width: 8 bits",
+            &avr_arch_test_config(),
+        );
+    }
+    #[test]
+    fn handle_hover_avr_arch_it_provides_reg_info_3() {
+        test_hover(
+            "x<cursor>",
+            "X [avr]
+General purpose X-register. Low byte is r26 and high byte is r27.
+
+Type: General Purpose Register
+Width: 16 bits",
+            &avr_arch_test_config(),
+        );
+    }
+    #[test]
+    fn handle_autocomplete_avr_arch_it_provides_reg_comps_1() {
+        test_register_autocomplete(
+            "ldi	r<cursor>",
+            &avr_arch_test_config(),
+            CompletionTriggerKind::INVOKED,
+            None,
+        );
+    }
+    #[test]
+    fn handle_autocomplete_avr_arch_it_provides_reg_comps_2() {
+        test_register_autocomplete(
+            "ldi	r1<cursor>,0xC0",
+            &avr_arch_test_config(),
+            CompletionTriggerKind::INVOKED,
+            None,
+        );
+    }
+    #[test]
+    fn handle_autocomplete_avr_arch_it_provides_reg_comps_3() {
+        test_register_autocomplete(
+            "fmuls	r16,r1<cursor>",
+            &avr_arch_test_config(),
+            CompletionTriggerKind::INVOKED,
+            None,
+        );
+    }
+    #[test]
     fn handle_autocomplete_avr_assembler_it_provides_dir_comps_no_args() {
         test_directive_autocomplete(
             ".und<cursor>",
@@ -2510,6 +2598,14 @@ Width: 8 bits",
             populate_registers
         );
     }
+    #[test]
+    fn serialized_avr_registers_are_up_to_date() {
+        serialized_registers_test!(
+            "serialized/registers/avr",
+            "../docs_store/registers/avr.xml",
+            populate_registers
+        );
+    }
 
     macro_rules! serialized_instructions_test {
         ($serialized_path:literal, $raw_path:literal, $populate_fn:expr) => {

asm-lsp/types.rs

@@ -669,6 +669,9 @@ pub enum Arch {
     #[strum(serialize = "power-isa")]
     #[serde(rename = "power-isa")]
     PowerISA,
+    #[strum(serialize = "avr")]
+    #[serde(rename = "avr")]
+    Avr,
     /// For testing purposes *only*. This is not a valid config option
     #[serde(skip)]
     None,
@@ -715,6 +718,7 @@ impl Arch {
             Self::PowerISA => {
                 load_registers_with_path!(Self::PowerISA, "serialized/registers/power-isa");
             }
+            Self::Avr => load_registers_with_path!(Self::Avr, "serialized/registers/avr"),
             Self::None => unreachable!(),
         }
     }
@@ -762,6 +766,7 @@ impl Arch {
             Self::PowerISA => {
                 load_instructions_with_path!(Self::PowerISA, "serialized/opcodes/power-isa");
             }
+            Self::Avr => warn!("AVR opcodes are not supported"),
             Self::None => unreachable!(),
         }
     }
@@ -814,6 +819,7 @@ impl std::fmt::Display for Arch {
             Self::Z80 => write!(f, "z80")?,
             Self::MOS6502 => write!(f, "6502")?,
             Self::PowerISA => write!(f, "power-isa")?,
+            Self::Avr => write!(f, "avr")?,
             Self::None => write!(f, "None")?,
         }
         Ok(())

asm_docs_parsing/regenerate.sh

@@ -27,6 +27,7 @@ cargo build --release
 ../target/release/asm_docs_parsing ../docs_store/registers/z80.xml -o ../asm-lsp/serialized/registers/z80 --doc-type register --arch z80
 ../target/release/asm_docs_parsing ../docs_store/registers/6502.xml -o ../asm-lsp/serialized/registers/6502 --doc-type register --arch 6502
 ../target/release/asm_docs_parsing ../docs_store/registers/power-isa.xml -o ../asm-lsp/serialized/registers/power-isa --doc-type register --arch power-isa
+../target/release/asm_docs_parsing ../docs_store/registers/avr.xml -o ../asm-lsp/serialized/registers/avr --doc-type register --arch avr
 
 # directive binaries
 ../target/release/asm_docs_parsing ../docs_store/directives/gas.xml -o ../asm-lsp/serialized/directives/gas --doc-type directive --assembler gas

docs_store/registers/avr.xml

@@ -0,0 +1,73 @@
+<?xml version='1.0' encoding='utf-8'?>
+<InstructionSet name="avr">
+    <Register name="r0" description="General purpose register 0. Mapped to address 0x00." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r1" description="General purpose register 1. Mapped to address 0x01." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r2" description="General purpose register 2. Mapped to address 0x02." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r3" description="General purpose register 3. Mapped to address 0x03." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r4" description="General purpose register 4. Mapped to address 0x04." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r5" description="General purpose register 5. Mapped to address 0x05." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r6" description="General purpose register 6. Mapped to address 0x06." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r7" description="General purpose register 7. Mapped to address 0x07." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r8" description="General purpose register 8. Mapped to address 0x08." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r9" description="General purpose register 9. Mapped to address 0x09." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r10" description="General purpose register 10. Mapped to address 0x0a." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r11" description="General purpose register 11. Mapped to address 0x0b." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r12" description="General purpose register 12. Mapped to address 0x0c." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r13" description="General purpose register 13. Mapped to address 0x0d." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r14" description="General purpose register 14. Mapped to address 0x0e." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r15" description="General purpose register 15. Mapped to address 0x0f." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r16" description="General purpose register 16. Mapped to address 0x10." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r17" description="General purpose register 17. Mapped to address 0x11." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r18" description="General purpose register 18. Mapped to address 0x12." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r19" description="General purpose register 19. Mapped to address 0x13." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r20" description="General purpose register 20. Mapped to address 0x14." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r21" description="General purpose register 21. Mapped to address 0x15." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r22" description="General purpose register 22. Mapped to address 0x16." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r23" description="General purpose register 23. Mapped to address 0x17." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r24" description="General purpose register 24. Mapped to address 0x18." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r25" description="General purpose register 25. Mapped to address 0x19." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r26" description="General purpose register 26. X register low byte. Mapped to address 0x1a." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r27" description="General purpose register 27. X register high byte. Mapped to address 0x1b." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r28" description="General purpose register 28. Y register low byte. Mapped to address 0x1c." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r29" description="General purpose register 29. Y register high byte. Mapped to address 0x1d." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r30" description="General purpose register 30. Z register low byte. Mapped to address 0x1e." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="r31" description="General purpose register 31. Z register high byte. Mapped to address 0x1f." type="General Purpose Register" width = "8 bits">
+    </Register>
+    <Register name="x" description="General purpose X-register. Low byte is r26 and high byte is r27." type="General Purpose Register" width = "16 bits">
+    </Register>
+    <Register name="y" description="General purpose Y-register. Low byte is r28 and high byte is r29." type="General Purpose Register" width = "16 bits">
+    </Register>
+    <Register name="z" description="General purpose Z-register. Low byte is r30 and high byte is r31." type="General Purpose Register" width = "16 bits">
+    </Register>
+</InstructionSet>