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Merge tag 'xtensa-for-next-20160731' of git://github.com/jcmvbkbc/lin…
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…ux-xtensa into for_next

Xtensa improvements for 4.8:

- add new kernel memory layouts for MMUv3 cores: with 256MB and 512MB
  KSEG size, starting at physical address other than 0;
- make kernel load address configurable;
- clean up kernel memory layout macros;
- drop sysmem early allocator and switch to memblock;
- enable kmemleak and memory reservation from the device tree;
- wire up new syscalls: userfaultfd, membarrier, mlock2, copy_file_range,
  preadv2 and pwritev2.
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@czankel
czankel committed Aug 3, 2016
2 parents 523d939 + d8d2f7f commit 9e8511f
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173 changes: 146 additions & 27 deletions Documentation/xtensa/mmu.txt
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,15 +3,8 @@ MMUv3 initialization sequence.
The code in the initialize_mmu macro sets up MMUv3 memory mapping
identically to MMUv2 fixed memory mapping. Depending on
CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX symbol this code is
located in one of the following address ranges:

0xF0000000..0xFFFFFFFF (will keep same address in MMU v2 layout;
typically ROM)
0x00000000..0x07FFFFFF (system RAM; this code is actually linked
at 0xD0000000..0xD7FFFFFF [cached]
or 0xD8000000..0xDFFFFFFF [uncached];
in any case, initially runs elsewhere
than linked, so have to be careful)
located in addresses it was linked for (symbol undefined), or not
(symbol defined), so it needs to be position-independent.

The code has the following assumptions:
This code fragment is run only on an MMU v3.
Expand All @@ -28,24 +21,26 @@ TLB setup proceeds along the following steps.
PA = physical address (two upper nibbles of it);
pc = physical range that contains this code;

After step 2, we jump to virtual address in 0x40000000..0x5fffffff
that corresponds to next instruction to execute in this code.
After step 4, we jump to intended (linked) address of this code.

Step 0 Step1 Step 2 Step3 Step 4 Step5
============ ===== ============ ===== ============ =====
VA PA PA VA PA PA VA PA PA
------ -- -- ------ -- -- ------ -- --
E0..FF -> E0 -> E0 E0..FF -> E0 F0..FF -> F0 -> F0
C0..DF -> C0 -> C0 C0..DF -> C0 E0..EF -> F0 -> F0
A0..BF -> A0 -> A0 A0..BF -> A0 D8..DF -> 00 -> 00
80..9F -> 80 -> 80 80..9F -> 80 D0..D7 -> 00 -> 00
60..7F -> 60 -> 60 60..7F -> 60
40..5F -> 40 40..5F -> pc -> pc 40..5F -> pc
20..3F -> 20 -> 20 20..3F -> 20
00..1F -> 00 -> 00 00..1F -> 00

The default location of IO peripherals is above 0xf0000000. This may change
After step 2, we jump to virtual address in the range 0x40000000..0x5fffffff
or 0x00000000..0x1fffffff, depending on whether the kernel was loaded below
0x40000000 or above. That address corresponds to next instruction to execute
in this code. After step 4, we jump to intended (linked) address of this code.
The scheme below assumes that the kernel is loaded below 0x40000000.

Step0 Step1 Step2 Step3 Step4 Step5
===== ===== ===== ===== ===== =====
VA PA PA PA PA VA PA PA
------ -- -- -- -- ------ -- --
E0..FF -> E0 -> E0 -> E0 F0..FF -> F0 -> F0
C0..DF -> C0 -> C0 -> C0 E0..EF -> F0 -> F0
A0..BF -> A0 -> A0 -> A0 D8..DF -> 00 -> 00
80..9F -> 80 -> 80 -> 80 D0..D7 -> 00 -> 00
60..7F -> 60 -> 60 -> 60
40..5F -> 40 -> pc -> pc 40..5F -> pc
20..3F -> 20 -> 20 -> 20
00..1F -> 00 -> 00 -> 00

The default location of IO peripherals is above 0xf0000000. This may be changed
using a "ranges" property in a device tree simple-bus node. See ePAPR 1.1, §6.5
for details on the syntax and semantic of simple-bus nodes. The following
limitations apply:
Expand All @@ -62,3 +57,127 @@ limitations apply:

6. The IO area covers the entire 256MB segment of parent-bus-address; the
"ranges" triplet length field is ignored


MMUv3 address space layouts.
============================

Default MMUv2-compatible layout.

Symbol VADDR Size
+------------------+
| Userspace | 0x00000000 TASK_SIZE
+------------------+ 0x40000000
+------------------+
| Page table | 0x80000000
+------------------+ 0x80400000
+------------------+
| KMAP area | PKMAP_BASE PTRS_PER_PTE *
| | DCACHE_N_COLORS *
| | PAGE_SIZE
| | (4MB * DCACHE_N_COLORS)
+------------------+
| Atomic KMAP area | FIXADDR_START KM_TYPE_NR *
| | NR_CPUS *
| | DCACHE_N_COLORS *
| | PAGE_SIZE
+------------------+ FIXADDR_TOP 0xbffff000
+------------------+
| VMALLOC area | VMALLOC_START 0xc0000000 128MB - 64KB
+------------------+ VMALLOC_END
| Cache aliasing | TLBTEMP_BASE_1 0xc7ff0000 DCACHE_WAY_SIZE
| remap area 1 |
+------------------+
| Cache aliasing | TLBTEMP_BASE_2 DCACHE_WAY_SIZE
| remap area 2 |
+------------------+
+------------------+
| Cached KSEG | XCHAL_KSEG_CACHED_VADDR 0xd0000000 128MB
+------------------+
| Uncached KSEG | XCHAL_KSEG_BYPASS_VADDR 0xd8000000 128MB
+------------------+
| Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB
+------------------+
| Uncached KIO | XCHAL_KIO_BYPASS_VADDR 0xf0000000 256MB
+------------------+


256MB cached + 256MB uncached layout.

Symbol VADDR Size
+------------------+
| Userspace | 0x00000000 TASK_SIZE
+------------------+ 0x40000000
+------------------+
| Page table | 0x80000000
+------------------+ 0x80400000
+------------------+
| KMAP area | PKMAP_BASE PTRS_PER_PTE *
| | DCACHE_N_COLORS *
| | PAGE_SIZE
| | (4MB * DCACHE_N_COLORS)
+------------------+
| Atomic KMAP area | FIXADDR_START KM_TYPE_NR *
| | NR_CPUS *
| | DCACHE_N_COLORS *
| | PAGE_SIZE
+------------------+ FIXADDR_TOP 0x9ffff000
+------------------+
| VMALLOC area | VMALLOC_START 0xa0000000 128MB - 64KB
+------------------+ VMALLOC_END
| Cache aliasing | TLBTEMP_BASE_1 0xa7ff0000 DCACHE_WAY_SIZE
| remap area 1 |
+------------------+
| Cache aliasing | TLBTEMP_BASE_2 DCACHE_WAY_SIZE
| remap area 2 |
+------------------+
+------------------+
| Cached KSEG | XCHAL_KSEG_CACHED_VADDR 0xb0000000 256MB
+------------------+
| Uncached KSEG | XCHAL_KSEG_BYPASS_VADDR 0xc0000000 256MB
+------------------+
+------------------+
| Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB
+------------------+
| Uncached KIO | XCHAL_KIO_BYPASS_VADDR 0xf0000000 256MB
+------------------+


512MB cached + 512MB uncached layout.

Symbol VADDR Size
+------------------+
| Userspace | 0x00000000 TASK_SIZE
+------------------+ 0x40000000
+------------------+
| Page table | 0x80000000
+------------------+ 0x80400000
+------------------+
| KMAP area | PKMAP_BASE PTRS_PER_PTE *
| | DCACHE_N_COLORS *
| | PAGE_SIZE
| | (4MB * DCACHE_N_COLORS)
+------------------+
| Atomic KMAP area | FIXADDR_START KM_TYPE_NR *
| | NR_CPUS *
| | DCACHE_N_COLORS *
| | PAGE_SIZE
+------------------+ FIXADDR_TOP 0x8ffff000
+------------------+
| VMALLOC area | VMALLOC_START 0x90000000 128MB - 64KB
+------------------+ VMALLOC_END
| Cache aliasing | TLBTEMP_BASE_1 0x97ff0000 DCACHE_WAY_SIZE
| remap area 1 |
+------------------+
| Cache aliasing | TLBTEMP_BASE_2 DCACHE_WAY_SIZE
| remap area 2 |
+------------------+
+------------------+
| Cached KSEG | XCHAL_KSEG_CACHED_VADDR 0xa0000000 512MB
+------------------+
| Uncached KSEG | XCHAL_KSEG_BYPASS_VADDR 0xc0000000 512MB
+------------------+
| Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB
+------------------+
| Uncached KIO | XCHAL_KIO_BYPASS_VADDR 0xf0000000 256MB
+------------------+
90 changes: 74 additions & 16 deletions arch/xtensa/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -13,16 +13,19 @@ config XTENSA
select GENERIC_IRQ_SHOW
select GENERIC_PCI_IOMAP
select GENERIC_SCHED_CLOCK
select HAVE_DEBUG_KMEMLEAK
select HAVE_DMA_API_DEBUG
select HAVE_EXIT_THREAD
select HAVE_FUNCTION_TRACER
select HAVE_FUTEX_CMPXCHG if !MMU
select HAVE_HW_BREAKPOINT if PERF_EVENTS
select HAVE_IRQ_TIME_ACCOUNTING
select HAVE_MEMBLOCK
select HAVE_OPROFILE
select HAVE_PERF_EVENTS
select IRQ_DOMAIN
select MODULES_USE_ELF_RELA
select NO_BOOTMEM
select PERF_USE_VMALLOC
select VIRT_TO_BUS
help
Expand Down Expand Up @@ -236,6 +239,69 @@ config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX

If in doubt, say Y.

config KSEG_PADDR
hex "Physical address of the KSEG mapping"
depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
default 0x00000000
help
This is the physical address where KSEG is mapped. Please refer to
the chosen KSEG layout help for the required address alignment.
Unpacked kernel image (including vectors) must be located completely
within KSEG.
Physical memory below this address is not available to linux.

If unsure, leave the default value here.

config KERNEL_LOAD_ADDRESS
hex "Kernel load address"
default 0x00003000
help
This is the address where the kernel is loaded.
It is virtual address for MMUv2 configurations and physical address
for all other configurations.

If unsure, leave the default value here.

config VECTORS_OFFSET
hex "Kernel vectors offset"
default 0x00003000
help
This is the offset of the kernel image from the relocatable vectors
base.

If unsure, leave the default value here.

choice
prompt "KSEG layout"
depends on MMU
default XTENSA_KSEG_MMU_V2

config XTENSA_KSEG_MMU_V2
bool "MMUv2: 128MB cached + 128MB uncached"
help
MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
without cache.
KSEG_PADDR must be aligned to 128MB.

config XTENSA_KSEG_256M
bool "256MB cached + 256MB uncached"
depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
help
TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
with cache and to 0xc0000000 without cache.
KSEG_PADDR must be aligned to 256MB.

config XTENSA_KSEG_512M
bool "512MB cached + 512MB uncached"
depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
help
TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
with cache and to 0xc0000000 without cache.
KSEG_PADDR must be aligned to 256MB.

endchoice

config HIGHMEM
bool "High Memory Support"
depends on MMU
Expand Down Expand Up @@ -331,7 +397,7 @@ config XTENSA_PLATFORM_XT2000
config XTENSA_PLATFORM_XTFPGA
bool "XTFPGA"
select ETHOC if ETHERNET
select PLATFORM_WANT_DEFAULT_MEM
select PLATFORM_WANT_DEFAULT_MEM if !MMU
select SERIAL_CONSOLE
select XTENSA_CALIBRATE_CCOUNT
help
Expand Down Expand Up @@ -369,6 +435,7 @@ config USE_OF
bool "Flattened Device Tree support"
select OF
select OF_EARLY_FLATTREE
select OF_RESERVED_MEM
help
Include support for flattened device tree machine descriptions.

Expand Down Expand Up @@ -439,16 +506,9 @@ config DEFAULT_MEM_START
default 0x00000000 if MMU
default 0x60000000 if !MMU
help
This is a fallback start address of the default memory area, it is
used when no physical memory size is passed through DTB or through
boot parameter from bootloader.

In noMMU configuration the following parameters are derived from it:
- kernel load address;
- kernel entry point address;
- relocatable vectors base address;
- uBoot load address;
- TASK_SIZE.
This is the base address of the default memory area.
Default memory area has platform-specific meaning, it may be used
for e.g. early cache initialization.

If unsure, leave the default value here.

Expand All @@ -457,11 +517,9 @@ config DEFAULT_MEM_SIZE
depends on PLATFORM_WANT_DEFAULT_MEM
default 0x04000000
help
This is a fallback size of the default memory area, it is used when
no physical memory size is passed through DTB or through boot
parameter from bootloader.

It's also used for TASK_SIZE calculation in noMMU configuration.
This is the size of the default memory area.
Default memory area has platform-specific meaning, it may be used
for e.g. early cache initialization.

If unsure, leave the default value here.

Expand Down
2 changes: 1 addition & 1 deletion arch/xtensa/boot/boot-elf/boot.lds.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ SECTIONS
*(.ResetVector.text)
}

.image KERNELOFFSET: AT (LOAD_MEMORY_ADDRESS)
.image KERNELOFFSET: AT (CONFIG_KERNEL_LOAD_ADDRESS)
{
_image_start = .;
*(image)
Expand Down
7 changes: 6 additions & 1 deletion arch/xtensa/boot/boot-elf/bootstrap.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,12 @@ _ResetVector:

.align 4
RomInitAddr:
.word LOAD_MEMORY_ADDRESS
#if defined(CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) && \
XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
.word CONFIG_KERNEL_LOAD_ADDRESS
#else
.word KERNELOFFSET
#endif
RomBootParam:
.word _bootparam
_bootparam:
Expand Down
10 changes: 1 addition & 9 deletions arch/xtensa/boot/boot-uboot/Makefile
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,15 +4,7 @@
# for more details.
#

ifdef CONFIG_MMU
ifdef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
UIMAGE_LOADADDR = 0x00003000
else
UIMAGE_LOADADDR = 0xd0003000
endif
else
UIMAGE_LOADADDR = $(shell printf "0x%x" $$(( ${CONFIG_DEFAULT_MEM_START} + 0x3000 )) )
endif
UIMAGE_LOADADDR = $(CONFIG_KERNEL_LOAD_ADDRESS)
UIMAGE_COMPRESSION = gzip

$(obj)/../uImage: vmlinux.bin.gz FORCE
Expand Down
2 changes: 1 addition & 1 deletion arch/xtensa/include/asm/bitops.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@ static inline int ffz(unsigned long x)
* __ffs: Find first bit set in word. Return 0 for bit 0
*/

static inline int __ffs(unsigned long x)
static inline unsigned long __ffs(unsigned long x)
{
return 31 - __cntlz(x & -x);
}
Expand Down
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