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Merge tag 'asoc-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/g…
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…it/broonie/sound into for-linus

ASoC: Updates for v4.18

This is a very big update, mainly due to a huge set of new drivers some
of which are individually very large.  We also have a lot of fixes for
the topology stuff, several of the users have stepped up and fixed some
the serious issues there, and continued progress on the transition away
from CODEC specific drivers to generic component drivers.

 - Many fixes for the topology code, including fixes for the half done
   v4 ABI compatibility from Guenter Roeck and other ABI fixes from
   Kirill Marinushkin.
 - Lots of cleanup for Intel platforms based on Realtek CODECs from Hans
   de Goode.
 - More followups on removing legacy CODEC things and transitioning to
   components from Morimoto-san.
 - Conversion of OMAP DMA to the new, more standard SDMA-PCM driver.
 - A series of fixes and updates to the rather elderly Cirrus Logic SoC
   drivers from Alexander Sverdlin.
 - Qualcomm DSP support from Srinivas Kandagatla.
 - New drivers for Analog SSM2305, Atmel I2S controllers, Mediatek
   MT6351, MT6797 and MT7622, Qualcomm DSPs, Realtek RT1305, RT1306 and
   RT5668 and TI TSCS454
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tiwai committed Jun 5, 2018
2 parents 7a6fc28 + aac521e commit d4d5a1c
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3 changes: 3 additions & 0 deletions .mailmap
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Expand Up @@ -186,6 +186,9 @@ Uwe Kleine-König <[email protected]>
Uwe Kleine-König <[email protected]>
Uwe Kleine-König <[email protected]>
Valdis Kletnieks <[email protected]>
Vinod Koul <[email protected]> <[email protected]>
Vinod Koul <[email protected]> <[email protected]>
Vinod Koul <[email protected]> <[email protected]>
Viresh Kumar <[email protected]> <[email protected]>
Viresh Kumar <[email protected]> <[email protected]>
Viresh Kumar <[email protected]> <[email protected]>
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84 changes: 84 additions & 0 deletions Documentation/devicetree/bindings/soc/qcom/qcom,apr.txt
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Qualcomm APR (Asynchronous Packet Router) binding

This binding describes the Qualcomm APR. APR is a IPC protocol for
communication between Application processor and QDSP. APR is mainly
used for audio/voice services on the QDSP.

- compatible:
Usage: required
Value type: <stringlist>
Definition: must be "qcom,apr-v<VERSION-NUMBER>", example "qcom,apr-v2"

- reg
Usage: required
Value type: <u32>
Definition: Destination processor ID.
Possible values are :
1 - APR simulator
2 - PC
3 - MODEM
4 - ADSP
5 - APPS
6 - MODEM2
7 - APPS2

= APR SERVICES
Each subnode of the APR node represents service tied to this apr. The name
of the nodes are not important. The properties of these nodes are defined
by the individual bindings for the specific service
- All APR services MUST contain the following property:

- reg
Usage: required
Value type: <u32>
Definition: APR Service ID
Possible values are :
3 - DSP Core Service
4 - Audio Front End Service.
5 - Voice Stream Manager Service.
6 - Voice processing manager.
7 - Audio Stream Manager Service.
8 - Audio Device Manager Service.
9 - Multimode voice manager.
10 - Core voice stream.
11 - Core voice processor.
12 - Ultrasound stream manager.
13 - Listen stream manager.

= EXAMPLE
The following example represents a QDSP based sound card on a MSM8996 device
which uses apr as communication between Apps and QDSP.

apr@4 {
compatible = "qcom,apr-v2";
reg = <APR_DOMAIN_ADSP>;

q6core@3 {
compatible = "qcom,q6core";
reg = <APR_SVC_ADSP_CORE>;
};

q6afe@4 {
compatible = "qcom,q6afe";
reg = <APR_SVC_AFE>;

dais {
#sound-dai-cells = <1>;
hdmi@1 {
reg = <1>;
};
};
};

q6asm@7 {
compatible = "qcom,q6asm";
reg = <APR_SVC_ASM>;
...
};

q6adm@8 {
compatible = "qcom,q6adm";
reg = <APR_SVC_ADM>;
...
};
};
14 changes: 14 additions & 0 deletions Documentation/devicetree/bindings/sound/adi,ssm2305.txt
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Analog Devices SSM2305 Speaker Amplifier
========================================

Required properties:
- compatible : "adi,ssm2305"
- shutdown-gpios : The gpio connected to the shutdown pin.
The gpio signal is ACTIVE_LOW.

Example:

ssm2305: analog-amplifier {
compatible = "adi,ssm2305";
shutdown-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
};
47 changes: 47 additions & 0 deletions Documentation/devicetree/bindings/sound/atmel-i2s.txt
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* Atmel I2S controller

Required properties:
- compatible: Should be "atmel,sama5d2-i2s".
- reg: Should be the physical base address of the controller and the
length of memory mapped region.
- interrupts: Should contain the interrupt for the controller.
- dmas: Should be one per channel name listed in the dma-names property,
as described in atmel-dma.txt and dma.txt files.
- dma-names: Two dmas have to be defined, "tx" and "rx".
This IP also supports one shared channel for both rx and tx;
if this mode is used, one "rx-tx" name must be used.
- clocks: Must contain an entry for each entry in clock-names.
Please refer to clock-bindings.txt.
- clock-names: Should be one of each entry matching the clocks phandles list:
- "pclk" (peripheral clock) Required.
- "gclk" (generated clock) Optional (1).
- "aclk" (Audio PLL clock) Optional (1).
- "muxclk" (I2S mux clock) Optional (1).

Optional properties:
- pinctrl-0: Should specify pin control groups used for this controller.
- princtrl-names: Should contain only one value - "default".


(1) : Only the peripheral clock is required. The generated clock, the Audio
PLL clock adn the I2S mux clock are optional and should only be set
together, when Master Mode is required.

Example:

i2s@f8050000 {
compatible = "atmel,sama5d2-i2s";
reg = <0xf8050000 0x300>;
interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(31))>,
<&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(32))>;
dma-names = "tx", "rx";
clocks = <&i2s0_clk>, <&i2s0_gclk>, <&audio_pll_pmc>, <&i2s0muxck>;
clock-names = "pclk", "gclk", "aclk", "muxclk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s0_default>;
};
2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/sound/cs42xx8.txt
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Expand Up @@ -16,7 +16,7 @@ Required properties:

Example:

codec: cs42888@48 {
cs42888: codec@48 {
compatible = "cirrus,cs42888";
reg = <0x48>;
clocks = <&codec_mclk 0>;
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10 changes: 6 additions & 4 deletions Documentation/devicetree/bindings/sound/fsl,asrc.txt
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Expand Up @@ -31,14 +31,16 @@ Required properties:
it. This property is optional depending on the SoC
design.

- big-endian : If this property is absent, the little endian mode
will be in use as default. Otherwise, the big endian
mode will be in use for all the device registers.

- fsl,asrc-rate : Defines a mutual sample rate used by DPCM Back Ends.

- fsl,asrc-width : Defines a mutual sample width used by DPCM Back Ends.

Optional properties:

- big-endian : If this property is absent, the little endian mode
will be in use as default. Otherwise, the big endian
mode will be in use for all the device registers.

Example:

asrc: asrc@2034000 {
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2 changes: 2 additions & 0 deletions Documentation/devicetree/bindings/sound/fsl,esai.txt
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Expand Up @@ -42,6 +42,8 @@ Required properties:
means all the settings for Receiving would be
duplicated from Transmition related registers.

Optional properties:

- big-endian : If this property is absent, the native endian mode
will be in use as default, or the big endian mode
will be in use for all the device registers.
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2 changes: 2 additions & 0 deletions Documentation/devicetree/bindings/sound/fsl,spdif.txt
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Expand Up @@ -33,6 +33,8 @@ Required properties:
it. This property is optional depending on the SoC
design.

Optional properties:

- big-endian : If this property is absent, the native endian mode
will be in use as default, or the big endian mode
will be in use for all the device registers.
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8 changes: 5 additions & 3 deletions Documentation/devicetree/bindings/sound/fsl-sai.txt
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Expand Up @@ -28,9 +28,6 @@ Required properties:
pinctrl-names. See ../pinctrl/pinctrl-bindings.txt
for details of the property values.

- big-endian : Boolean property, required if all the FTM_PWM
registers are big-endian rather than little-endian.

- lsb-first : Configures whether the LSB or the MSB is transmitted
first for the fifo data. If this property is absent,
the MSB is transmitted first as default, or the LSB
Expand All @@ -48,6 +45,11 @@ Required properties:
receive data by following their own bit clocks and
frame sync clocks separately.

Optional properties:

- big-endian : Boolean property, required if all the SAI
registers are big-endian rather than little-endian.

Optional properties (for mx6ul):

- fsl,sai-mclk-direction-output: This is a boolean property. If present,
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4 changes: 3 additions & 1 deletion Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt
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Mediatek AFE PCM controller for mt2701

Required properties:
- compatible = "mediatek,mt2701-audio";
- compatible: should be one of the followings.
- "mediatek,mt2701-audio"
- "mediatek,mt7622-audio"
- interrupts: should contain AFE and ASYS interrupts
- interrupt-names: should be "afe" and "asys"
- power-domains: should define the power domain
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16 changes: 16 additions & 0 deletions Documentation/devicetree/bindings/sound/mt6351.txt
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Mediatek MT6351 Audio Codec

The communication between MT6351 and SoC is through Mediatek PMIC wrapper.
For more detail, please visit Mediatek PMIC wrapper documentation.

Must be a child node of PMIC wrapper.

Required properties:

- compatible : "mediatek,mt6351-sound".

Example:

mt6351_snd {
compatible = "mediatek,mt6351-sound";
};
42 changes: 42 additions & 0 deletions Documentation/devicetree/bindings/sound/mt6797-afe-pcm.txt
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Mediatek AFE PCM controller for mt6797

Required properties:
- compatible = "mediatek,mt6797-audio";
- reg: register location and size
- interrupts: should contain AFE interrupt
- power-domains: should define the power domain
- clocks: Must contain an entry for each entry in clock-names
- clock-names: should have these clock names:
"infra_sys_audio_clk",
"infra_sys_audio_26m",
"mtkaif_26m_clk",
"top_mux_audio",
"top_mux_aud_intbus",
"top_sys_pll3_d4",
"top_sys_pll1_d4",
"top_clk26m_clk";

Example:

afe: mt6797-afe-pcm@11220000 {
compatible = "mediatek,mt6797-audio";
reg = <0 0x11220000 0 0x1000>;
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_LOW>;
power-domains = <&scpsys MT6797_POWER_DOMAIN_AUDIO>;
clocks = <&infrasys CLK_INFRA_AUDIO>,
<&infrasys CLK_INFRA_AUDIO_26M>,
<&infrasys CLK_INFRA_AUDIO_26M_PAD_TOP>,
<&topckgen CLK_TOP_MUX_AUDIO>,
<&topckgen CLK_TOP_MUX_AUD_INTBUS>,
<&topckgen CLK_TOP_SYSPLL3_D4>,
<&topckgen CLK_TOP_SYSPLL1_D4>,
<&clk26m>;
clock-names = "infra_sys_audio_clk",
"infra_sys_audio_26m",
"mtkaif_26m_clk",
"top_mux_audio",
"top_mux_aud_intbus",
"top_sys_pll3_d4",
"top_sys_pll1_d4",
"top_clk26m_clk";
};
14 changes: 14 additions & 0 deletions Documentation/devicetree/bindings/sound/mt6797-mt6351.txt
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MT6797 with MT6351 CODEC

Required properties:
- compatible: "mediatek,mt6797-mt6351-sound"
- mediatek,platform: the phandle of MT6797 ASoC platform
- mediatek,audio-codec: the phandles of MT6351 codec

Example:

sound {
compatible = "mediatek,mt6797-mt6351-sound";
mediatek,audio-codec = <&mt6351_snd>;
mediatek,platform = <&afe>;
};
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