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AMDGPU/SI: Do not insert EndCf in an unreachable block
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Reviewers:
  arsenm

Differential Revision:
  http://reviews.llvm.org/D22025

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297243 91177308-0d34-0410-b5e6-96231b3b80d8
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Changpeng Fang committed Mar 7, 2017
1 parent 70bc85f commit 2e72970
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Showing 3 changed files with 43 additions and 3 deletions.
5 changes: 3 additions & 2 deletions lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -372,8 +372,9 @@ void SIAnnotateControlFlow::closeControlFlow(BasicBlock *BB) {
}

Value *Exec = popSaved();
if (!isa<UndefValue>(Exec))
CallInst::Create(EndCf, Exec, "", &*BB->getFirstInsertionPt());
Instruction *FirstInsertionPt = &*BB->getFirstInsertionPt();
if (!isa<UndefValue>(Exec) && !isa<UnreachableInst>(FirstInsertionPt))
CallInst::Create(EndCf, Exec, "", FirstInsertionPt);
}

/// \brief Annotate the control flow with intrinsics so the backend can
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1 change: 0 additions & 1 deletion test/CodeGen/AMDGPU/ret_jump.ll
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Expand Up @@ -15,7 +15,6 @@
; GCN-NEXT: s_branch [[FINAL_BB:BB[0-9]+_[0-9]+]]

; GCN-NEXT: [[UNREACHABLE_BB]]:
; GCN-NEXT: s_or_b64 exec, exec, [[XOR_EXEC]]
; GCN-NEXT: [[FINAL_BB]]:
; GCN-NEXT: .Lfunc_end0
define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([9 x <16 x i8>] addrspace(2)* byval %arg, [17 x <16 x i8>] addrspace(2)* byval %arg1, [17 x <8 x i32>] addrspace(2)* byval %arg2, i32 addrspace(2)* byval %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, i32 %arg18, i32 %arg19, float %arg20, i32 %arg21) #0 {
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40 changes: 40 additions & 0 deletions test/CodeGen/AMDGPU/si-annotate-cf-unreachable.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,40 @@
; RUN: opt -mtriple=amdgcn-- -S -structurizecfg -si-annotate-control-flow %s | FileCheck -check-prefix=OPT %s
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s


; OPT-LABEL: @annotate_unreachable(
; OPT: call { i1, i64 } @llvm.amdgcn.if(
; OPT-NOT: call void @llvm.amdgcn.end.cf(


; GCN-LABEL: {{^}}annotate_unreachable:
; GCN: s_and_saveexec_b64
; GCN-NOT: s_endpgm
; GCN: .Lfunc_end0
define void @annotate_unreachable(<4 x float> addrspace(1)* noalias nocapture readonly %arg) #0 {
bb:
%tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
br label %bb1

bb1: ; preds = %bb
%tmp2 = sext i32 %tmp to i64
%tmp3 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %arg, i64 %tmp2
%tmp4 = load <4 x float>, <4 x float> addrspace(1)* %tmp3, align 16
br i1 undef, label %bb3, label %bb5 ; label order reversed

bb3: ; preds = %bb1
%tmp6 = extractelement <4 x float> %tmp4, i32 2
%tmp7 = fcmp olt float %tmp6, 0.000000e+00
br i1 %tmp7, label %bb4, label %bb5

bb4: ; preds = %bb3
unreachable

bb5: ; preds = %bb3, %bb1
unreachable
}

declare i32 @llvm.amdgcn.workitem.id.x() #1

attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }

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