A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs
You can download a Verilog model of the Cypress HyperRAM from their website. http://www.cypress.com/verilog/s27kl0641-verilog
radiant/ - Lattice Radiant project of the RISC-V + HyperRAM controller design
iCEStorm/ - iCEStorm project of the RISC-V + HyperRAM controller design
riscv32/ - picorv32 and picoSoC RISC-V files
simulation/ - Simulation of standalone controller
standalone/ - Simple HyperRam Controller
Sources: RISC-V examples were based off of the PicoSoC examples provided by mmicko at the Hackaday FPGA101 Workshop. Thank you for the great examples mmicko! https://github.com/mmicko/fpga101-workshop