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1. PinAIpple PinAIpple Public

   A system integration of a static low power accelerator of bayesian machines (based on IBEX/lowriscv)

   SystemVerilog 1

2. CUDA-training CUDA-training Public

   Forked from tpoisot/CUDA-training

   CUDA programs for our training session.

   C

3. RAN_VHDL RAN_VHDL Public

4. common_cells common_cells Public

   Forked from pulp-platform/common_cells

   Common SystemVerilog components

   SystemVerilog

5. cluster_interconnect cluster_interconnect Public

   Forked from pulp-platform/cluster_interconnect

   SystemVerilog

6. Fraise Fraise Public

   the control hardware for the bayesian machine accelerator to be integrated in Pinaipple

   SystemVerilog