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Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next
Pull networking updates from David Miller:
1) Add WireGuard
2) Add HE and TWT support to ath11k driver, from John Crispin.
3) Add ESP in TCP encapsulation support, from Sabrina Dubroca.
4) Add variable window congestion control to TIPC, from Jon Maloy.
5) Add BCM84881 PHY driver, from Russell King.
6) Start adding netlink support for ethtool operations, from Michal
Kubecek.
7) Add XDP drop and TX action support to ena driver, from Sameeh
Jubran.
8) Add new ipv4 route notifications so that mlxsw driver does not have
to handle identical routes itself. From Ido Schimmel.
9) Add BPF dynamic program extensions, from Alexei Starovoitov.
10) Support RX and TX timestamping in igc, from Vinicius Costa Gomes.
11) Add support for macsec HW offloading, from Antoine Tenart.
12) Add initial support for MPTCP protocol, from Christoph Paasch,
Matthieu Baerts, Florian Westphal, Peter Krystad, and many others.
13) Add Octeontx2 PF support, from Sunil Goutham, Geetha sowjanya, Linu
Cherian, and others.
* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1469 commits)
net: phy: add default ARCH_BCM_IPROC for MDIO_BCM_IPROC
udp: segment looped gso packets correctly
netem: change mailing list
qed: FW 8.42.2.0 debug features
qed: rt init valid initialization changed
qed: Debug feature: ilt and mdump
qed: FW 8.42.2.0 Add fw overlay feature
qed: FW 8.42.2.0 HSI changes
qed: FW 8.42.2.0 iscsi/fcoe changes
qed: Add abstraction for different hsi values per chip
qed: FW 8.42.2.0 Additional ll2 type
qed: Use dmae to write to widebus registers in fw_funcs
qed: FW 8.42.2.0 Parser offsets modified
qed: FW 8.42.2.0 Queue Manager changes
qed: FW 8.42.2.0 Expose new registers and change windows
qed: FW 8.42.2.0 Internal ram offsets modifications
MAINTAINERS: Add entry for Marvell OcteonTX2 Physical Function driver
Documentation: net: octeontx2: Add RVU HW and drivers overview
octeontx2-pf: ethtool RSS config support
octeontx2-pf: Add basic ethtool support
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,63 @@ | ||
| What: /sys/bus/mdio_bus/devices/.../statistics/ | ||
| Date: January 2020 | ||
| KernelVersion: 5.6 | ||
| Contact: [email protected] | ||
| Description: | ||
| This folder contains statistics about global and per | ||
| MDIO bus address statistics. | ||
|
|
||
| What: /sys/bus/mdio_bus/devices/.../statistics/transfers | ||
| Date: January 2020 | ||
| KernelVersion: 5.6 | ||
| Contact: [email protected] | ||
| Description: | ||
| Total number of transfers for this MDIO bus. | ||
|
|
||
| What: /sys/bus/mdio_bus/devices/.../statistics/errors | ||
| Date: January 2020 | ||
| KernelVersion: 5.6 | ||
| Contact: [email protected] | ||
| Description: | ||
| Total number of transfer errors for this MDIO bus. | ||
|
|
||
| What: /sys/bus/mdio_bus/devices/.../statistics/writes | ||
| Date: January 2020 | ||
| KernelVersion: 5.6 | ||
| Contact: [email protected] | ||
| Description: | ||
| Total number of write transactions for this MDIO bus. | ||
|
|
||
| What: /sys/bus/mdio_bus/devices/.../statistics/reads | ||
| Date: January 2020 | ||
| KernelVersion: 5.6 | ||
| Contact: [email protected] | ||
| Description: | ||
| Total number of read transactions for this MDIO bus. | ||
|
|
||
| What: /sys/bus/mdio_bus/devices/.../statistics/transfers_<addr> | ||
| Date: January 2020 | ||
| KernelVersion: 5.6 | ||
| Contact: [email protected] | ||
| Description: | ||
| Total number of transfers for this MDIO bus address. | ||
|
|
||
| What: /sys/bus/mdio_bus/devices/.../statistics/errors_<addr> | ||
| Date: January 2020 | ||
| KernelVersion: 5.6 | ||
| Contact: [email protected] | ||
| Description: | ||
| Total number of transfer errors for this MDIO bus address. | ||
|
|
||
| What: /sys/bus/mdio_bus/devices/.../statistics/writes_<addr> | ||
| Date: January 2020 | ||
| KernelVersion: 5.6 | ||
| Contact: [email protected] | ||
| Description: | ||
| Total number of write transactions for this MDIO bus address. | ||
|
|
||
| What: /sys/bus/mdio_bus/devices/.../statistics/reads_<addr> | ||
| Date: January 2020 | ||
| KernelVersion: 5.6 | ||
| Contact: [email protected] | ||
| Description: | ||
| Total number of read transactions for this MDIO bus address. |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,148 @@ | ||
| Atheros AR9331 built-in switch | ||
| ============================= | ||
|
|
||
| It is a switch built-in to Atheros AR9331 WiSoC and addressable over internal | ||
| MDIO bus. All PHYs are built-in as well. | ||
|
|
||
| Required properties: | ||
|
|
||
| - compatible: should be: "qca,ar9331-switch" | ||
| - reg: Address on the MII bus for the switch. | ||
| - resets : Must contain an entry for each entry in reset-names. | ||
| - reset-names : Must include the following entries: "switch" | ||
| - interrupt-parent: Phandle to the parent interrupt controller | ||
| - interrupts: IRQ line for the switch | ||
| - interrupt-controller: Indicates the switch is itself an interrupt | ||
| controller. This is used for the PHY interrupts. | ||
| - #interrupt-cells: must be 1 | ||
| - mdio: Container of PHY and devices on the switches MDIO bus. | ||
|
|
||
| See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional | ||
| required and optional properties. | ||
| Examples: | ||
|
|
||
| eth0: ethernet@19000000 { | ||
| compatible = "qca,ar9330-eth"; | ||
| reg = <0x19000000 0x200>; | ||
| interrupts = <4>; | ||
|
|
||
| resets = <&rst 9>, <&rst 22>; | ||
| reset-names = "mac", "mdio"; | ||
| clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>; | ||
| clock-names = "eth", "mdio"; | ||
|
|
||
| phy-mode = "mii"; | ||
| phy-handle = <&phy_port4>; | ||
| }; | ||
|
|
||
| eth1: ethernet@1a000000 { | ||
| compatible = "qca,ar9330-eth"; | ||
| reg = <0x1a000000 0x200>; | ||
| interrupts = <5>; | ||
| resets = <&rst 13>, <&rst 23>; | ||
| reset-names = "mac", "mdio"; | ||
| clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>; | ||
| clock-names = "eth", "mdio"; | ||
|
|
||
| phy-mode = "gmii"; | ||
|
|
||
| fixed-link { | ||
| speed = <1000>; | ||
| full-duplex; | ||
| }; | ||
|
|
||
| mdio { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
|
|
||
| switch10: switch@10 { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
|
|
||
| compatible = "qca,ar9331-switch"; | ||
| reg = <0x10>; | ||
| resets = <&rst 8>; | ||
| reset-names = "switch"; | ||
|
|
||
| interrupt-parent = <&miscintc>; | ||
| interrupts = <12>; | ||
|
|
||
| interrupt-controller; | ||
| #interrupt-cells = <1>; | ||
|
|
||
| ports { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
|
|
||
| switch_port0: port@0 { | ||
| reg = <0x0>; | ||
| label = "cpu"; | ||
| ethernet = <ð1>; | ||
|
|
||
| phy-mode = "gmii"; | ||
|
|
||
| fixed-link { | ||
| speed = <1000>; | ||
| full-duplex; | ||
| }; | ||
| }; | ||
|
|
||
| switch_port1: port@1 { | ||
| reg = <0x1>; | ||
| phy-handle = <&phy_port0>; | ||
| phy-mode = "internal"; | ||
| }; | ||
|
|
||
| switch_port2: port@2 { | ||
| reg = <0x2>; | ||
| phy-handle = <&phy_port1>; | ||
| phy-mode = "internal"; | ||
| }; | ||
|
|
||
| switch_port3: port@3 { | ||
| reg = <0x3>; | ||
| phy-handle = <&phy_port2>; | ||
| phy-mode = "internal"; | ||
| }; | ||
|
|
||
| switch_port4: port@4 { | ||
| reg = <0x4>; | ||
| phy-handle = <&phy_port3>; | ||
| phy-mode = "internal"; | ||
| }; | ||
| }; | ||
|
|
||
| mdio { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
|
|
||
| interrupt-parent = <&switch10>; | ||
|
|
||
| phy_port0: phy@0 { | ||
| reg = <0x0>; | ||
| interrupts = <0>; | ||
| }; | ||
|
|
||
| phy_port1: phy@1 { | ||
| reg = <0x1>; | ||
| interrupts = <0>; | ||
| }; | ||
|
|
||
| phy_port2: phy@2 { | ||
| reg = <0x2>; | ||
| interrupts = <0>; | ||
| }; | ||
|
|
||
| phy_port3: phy@3 { | ||
| reg = <0x3>; | ||
| interrupts = <0>; | ||
| }; | ||
|
|
||
| phy_port4: phy@4 { | ||
| reg = <0x4>; | ||
| interrupts = <0>; | ||
| }; | ||
| }; | ||
| }; | ||
| }; | ||
| }; |
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