Initial set of changes to support building with MSVC 2013. Right now …

…there's a bunch fo assumptions in the .vcxproj file and some things are not as clean as they should be, but it does build a full build and works (at least the x86 side). The point of this initial checkpoint is to make sure that nothing breaks on the GCC side, that everyone is ok with the changes to the source (or if better fixes/typing can be done).

COMPILE.TXT

@@ -42,7 +42,7 @@ Capstone requires no prerequisite packages, so it is easy to compile & install.
   Users are then required to enter root password to copy Capstone into machine
   system directories.
 
-  Afterwards, run ./tests/test* to see the tests disassembling sample code.
+  Afterwards, run "./tests/test*" to see the tests disassembling sample code.
 
 
   NOTE: The core framework installed by "./make.sh install" consist of
@@ -70,8 +70,7 @@ Capstone requires no prerequisite packages, so it is easy to compile & install.
 	- To cross-compile Windows 64-bit binary, run:
 		$ ./make.sh cross-win64
 
-  Resulted files libcapstone.dll, libcapstone.dll.a & tests/test*.exe can then
-  be used on Windows machine.
+  Resulted files "capstone.dll" and "tests/test*.exe" can then be used on Windows machine.
 
 
 
@@ -85,8 +84,6 @@ Capstone requires no prerequisite packages, so it is easy to compile & install.
         - To compile Windows 64-bit binary under Cygwin, run
                 $ ./make.sh cygwin-mingw64
 
-  Resulted files libcapstone.dll, libcapstone.dll.a & tests/test*.exe can then
-  be used on Windows machine.
 
 
 (5) By default, "cc" (default C compiler on the system) is used as compiler.
@@ -103,9 +100,6 @@ Capstone requires no prerequisite packages, so it is easy to compile & install.
 
 (6) Language bindings
 
-  So far, Python, Ocaml & Java are supported by bindings in the main code.
-  Look for the bindings under directory bindings/, and refer to README file
-  of corresponding languages.
-
-  Community also provide bindings for C#, Go, Ruby & Vala. Links to these can
-  be found at address http://capstone-engine.org/download.html
+  So far, Python, Ruby, Ocaml, Java, C# and Go are supported by bindings. Look for
+  the bindings under directory bindings/, and refer to README file of
+  corresponding languages.

ChangeLog

@@ -1,72 +1,11 @@
 This file details the changelog of Capstone.
 
----------------------------------
-Version 2.0: January 22nd, 2014
 
-Release 2.0 deprecates verison 1.0 and brings a lot of crucial changes.
+[Version 2.0]: upcoming
 
-[ API changes ]
+- See changelog at https://github.com/aquynh/capstone/wiki/ChangeLog
 
-- API version has been bumped to 2.0 (see cs_version() API)
-- New API cs_strerror(errno) returns a string describing error code given
-  in its only argument.
-- cs_version() now returns combined version encoding both major & minor versions.
-- New option CS_OPT_MODE allows to change engine’s mode at run-time with
-  cs_option().
-- New option CS_OPT_MEM allows to specify user-defined functions for dynamically
-  memory management used internally by Capstone. This is useful to embed Capstone
-  into special environments such as kernel or firware.
-- New API cs_support() can be used to check if this lib supports a particular
-  architecture (this is necessary since we now allow to choose which architectures
-  to compile in).
-- The detail option is OFF by default now. To get detail information, it should be
-  explicitly turned ON. The details then can be accessed using cs_insn.detail
-  pointer (to newly added structure cs_detail)
 
-
-[ Core changes ]
-
-- On memory usage, Capstone uses much less memory, but a lot faster now.
-- User now can choose which architectures to be supported by modifying config.mk
-  before compiling/installing.
-
-
-[ Architectures ]
-
-- Arm
-     - Support Big-Endian mode (besides Little-Endian mode).
-     - Support friendly register, so instead of output sub "r12,r11,0x14",
-	 we have "sub ip,fp,0x14".
-- Arm64: support Big-Endian mode (besides Little-Endian mode).
-- PowerPC: newly added.
-- Mips: support friendly register, so instead of output "srl $2,$1,0x1f",
-     we have "srl $v0,$at,0x1f".
-- X86: bug fixes.
-
-
-[ Python binding ]
-
-- Python binding is vastly improved in performance: around 3 ~ 4 times faster
-  than in 1.0.
-- Cython support has been added, which can further speed up over the default
-  pure Python binding (up to 30% in some cases)
-- Function cs_disasm_quick() & Cs.disasm() now use generator (rather than a list)
-  to return succesfully disassembled instructions. This improves the performance
-  and reduces memory usage.
-
-
-[ Java binding ]
-
-- Better performance & bug fixes.
-
-
-[ Miscellaneous ]
-
-- Fixed some installation issues with Gentoo Linux.
-- Capstone now can easily compile/install on all *nix, including Linux, OSX,
-  {Net, Free, Open}BSD & Solaris.
-
-----------------------------------
 [Version 1.0]: December 18th, 2013
 
 - Initial public release.

MCRegisterInfo.c

@@ -63,10 +63,12 @@ static uint16_t DiffListIterator_getVal(DiffListIterator *d)
 
 static bool DiffListIterator_next(DiffListIterator *d)
 {
+    MCPhysReg D;
+
 	if (d->List == 0)
 		return false;
 
-	MCPhysReg D = *d->List;
+	D = *d->List;
 	d->List++;
 	d->Val += D;
 
@@ -89,7 +91,7 @@ unsigned MCRegisterInfo_getMatchingSuperReg(MCRegisterInfo *RI, unsigned Reg, un
 		return 0;
 	}
 
-	DiffListIterator_init(&iter, Reg, RI->DiffLists + RI->Desc[Reg].SuperRegs);
+	DiffListIterator_init(&iter, (MCPhysReg)Reg, RI->DiffLists + RI->Desc[Reg].SuperRegs);
 	DiffListIterator_next(&iter);
 
 	while(DiffListIterator_isValid(&iter)) {
@@ -108,7 +110,7 @@ unsigned MCRegisterInfo_getSubReg(MCRegisterInfo *RI, unsigned Reg, unsigned Idx
 	DiffListIterator iter;
 	uint16_t *SRI = RI->SubRegIndices + RI->Desc[Reg].SubRegIndices;
 
-	DiffListIterator_init(&iter, Reg, RI->DiffLists + RI->Desc[Reg].SubRegs);
+	DiffListIterator_init(&iter, (MCPhysReg)Reg, RI->DiffLists + RI->Desc[Reg].SubRegs);
 	DiffListIterator_next(&iter);
 
 	while(DiffListIterator_isValid(&iter)) {

MathExtras.h

@@ -131,7 +131,9 @@ static inline unsigned CountLeadingZeros_64(uint64_t Value) {
 #endif
 	Count = __builtin_clzll(Value);
 #else
-	if (sizeof(long) == sizeof(int64_t)) {
+#ifndef _MSC_VER
+	if (sizeof(long) == sizeof(int64_t))
+    {
 		if (!Value) return 64;
 		Count = 0;
 		// bisection method for count leading zeros
@@ -143,7 +145,10 @@ static inline unsigned CountLeadingZeros_64(uint64_t Value) {
 				Count |= Shift;
 			}
 		}
-	} else {
+	}
+    else
+#endif
+    {
 		// get hi portion
 		uint32_t Hi = Hi_32(Value);
 
@@ -250,7 +255,7 @@ static inline unsigned CountPopulation_64(uint64_t Value) {
 	uint64_t v = Value - ((Value >> 1) & 0x5555555555555555ULL);
 	v = (v & 0x3333333333333333ULL) + ((v >> 2) & 0x3333333333333333ULL);
 	v = (v + (v >> 4)) & 0x0F0F0F0F0F0F0F0FULL;
-	return unsigned((uint64_t)(v * 0x0101010101010101ULL) >> 56);
+	return (uint64_t)((v * 0x0101010101010101ULL) >> 56);
 #endif
 }
 

README

@@ -11,11 +11,10 @@ Capstone offers some unparalleled features:
 - Provide details on disassembled instruction (called “decomposer” by others).
 
 - Provide semantics of the disassembled instruction, such as list of implicit
-  registers read & written.
+     registers read & written.
 
-- Implemented in pure C language, with lightweight wrappers for C++, C#, Go,
-  Java, Ocaml, Python, Ruby & Vala ready (either available in main code,
-  or provided externally by community).
+- Implemented in pure C language, with lightweight wrappers for C++, Python,
+     Ruby, OCaml, C#, Java and Go available.
 
 - Native support for Windows & *nix platforms (with OSX, Linux, *BSD & Solaris
   have been confirmed).

arch/AArch64/AArch64BaseInfo.c

@@ -41,7 +41,7 @@ static bool compare_lower_str(char *s1, char *s2)
 {
 	char *lower = cs_strdup(s2), *c;
 	for (c = lower; *c; c++)
-		*c = tolower((int) *c);
+		*c = (char)tolower((int) *c);
 
 	bool res = (strcmp(s1, lower) == 0);
 	cs_mem_free(lower);
@@ -60,7 +60,7 @@ uint32_t NamedImmMapper_fromString(NamedImmMapper *N, char *Name, bool *Valid)
 	}
 
 	*Valid = false;
-	return -1;
+	return (uint32_t)-1;
 }
 
 bool NamedImmMapper_validImm(NamedImmMapper *N, uint32_t Value)

arch/AArch64/AArch64Disassembler.c

@@ -215,9 +215,14 @@ static bool Check(DecodeStatus *Out, DecodeStatus In);
 static uint64_t getFeatureBits(int feature)
 {
 	// enable all features
-	return -1;
+	return (uint64_t)-1;
 }
 
+#ifdef _MSC_VER
+#pragma warning(disable:4242)
+#pragma warning(disable:4244)
+#pragma warning(disable:4706)
+#endif
 #include "AArch64GenDisassemblerTables.inc"
 
 #define GET_INSTRINFO_ENUM
@@ -308,10 +313,12 @@ static unsigned getReg(MCRegisterInfo *MRI, unsigned RC, unsigned RegNo)
 static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo,
 		uint64_t Address, void *Decoder)
 {
+    uint16_t Register;
+
 	if (RegNo > 31)
 		return MCDisassembler_Fail;
 
-	uint16_t Register = getReg(Decoder, AArch64_GPR64RegClassID, RegNo);
+	Register = getReg(Decoder, AArch64_GPR64RegClassID, RegNo);
 	MCInst_addOperand(Inst, MCOperand_CreateReg(Register));
 	return MCDisassembler_Success;
 }
@@ -320,10 +327,12 @@ static DecodeStatus
 DecodeGPR64xspRegisterClass(MCInst *Inst, unsigned RegNo,
 		uint64_t Address, void *Decoder)
 {
+    uint16_t Register;
+
 	if (RegNo > 31)
 		return MCDisassembler_Fail;
 
-	uint16_t Register = getReg(Decoder, AArch64_GPR64xspRegClassID, RegNo);
+	Register = getReg(Decoder, AArch64_GPR64xspRegClassID, RegNo);
 	MCInst_addOperand(Inst, MCOperand_CreateReg(Register));
 	return MCDisassembler_Success;
 }
@@ -332,10 +341,12 @@ static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo,
 		uint64_t Address,
 		void *Decoder)
 {
+    uint16_t Register;
+
 	if (RegNo > 31)
 		return MCDisassembler_Fail;
 
-	uint16_t Register = getReg(Decoder, AArch64_GPR32RegClassID, RegNo);
+	Register = getReg(Decoder, AArch64_GPR32RegClassID, RegNo);
 	MCInst_addOperand(Inst, MCOperand_CreateReg(Register));
 	return MCDisassembler_Success;
 }
@@ -344,10 +355,12 @@ static DecodeStatus
 DecodeGPR32wspRegisterClass(MCInst *Inst, unsigned RegNo,
 		uint64_t Address, void *Decoder)
 {
+    uint16_t Register;
+
 	if (RegNo > 31)
 		return MCDisassembler_Fail;
 
-	uint16_t Register = getReg(Decoder, AArch64_GPR32wspRegClassID, RegNo);
+	Register = getReg(Decoder, AArch64_GPR32wspRegClassID, RegNo);
 	MCInst_addOperand(Inst, MCOperand_CreateReg(Register));
 	return MCDisassembler_Success;
 }
@@ -356,10 +369,12 @@ static DecodeStatus
 DecodeFPR8RegisterClass(MCInst *Inst, unsigned RegNo,
 		uint64_t Address, void *Decoder)
 {
+    uint16_t Register;
+
 	if (RegNo > 31)
 		return MCDisassembler_Fail;
 
-	uint16_t Register = getReg(Decoder, AArch64_FPR8RegClassID, RegNo);
+	Register = getReg(Decoder, AArch64_FPR8RegClassID, RegNo);
 	MCInst_addOperand(Inst, MCOperand_CreateReg(Register));
 	return MCDisassembler_Success;
 }
@@ -368,10 +383,12 @@ static DecodeStatus
 DecodeFPR16RegisterClass(MCInst *Inst, unsigned RegNo,
 		uint64_t Address, void *Decoder)
 {
+    uint16_t Register;
+
 	if (RegNo > 31)
 		return MCDisassembler_Fail;
 
-	uint16_t Register = getReg(Decoder, AArch64_FPR16RegClassID, RegNo);
+	Register = getReg(Decoder, AArch64_FPR16RegClassID, RegNo);
 	MCInst_addOperand(Inst, MCOperand_CreateReg(Register));
 	return MCDisassembler_Success;
 }
@@ -381,10 +398,12 @@ static DecodeStatus
 DecodeFPR32RegisterClass(MCInst *Inst, unsigned RegNo,
 		uint64_t Address, void *Decoder)
 {
+    uint16_t Register;
+
 	if (RegNo > 31)
 		return MCDisassembler_Fail;
 
-	uint16_t Register = getReg(Decoder, AArch64_FPR32RegClassID, RegNo);
+	Register = getReg(Decoder, AArch64_FPR32RegClassID, RegNo);
 	MCInst_addOperand(Inst, MCOperand_CreateReg(Register));
 	return MCDisassembler_Success;
 }
@@ -393,10 +412,12 @@ static DecodeStatus
 DecodeFPR64RegisterClass(MCInst *Inst, unsigned RegNo,
 		uint64_t Address, void *Decoder)
 {
+    uint16_t Register;
+
 	if (RegNo > 31)
 		return MCDisassembler_Fail;
 
-	uint16_t Register = getReg(Decoder, AArch64_FPR64RegClassID, RegNo);
+	Register = getReg(Decoder, AArch64_FPR64RegClassID, RegNo);
 	MCInst_addOperand(Inst, MCOperand_CreateReg(Register));
 	return MCDisassembler_Success;
 }
@@ -415,10 +436,12 @@ static DecodeStatus
 DecodeFPR128RegisterClass(MCInst *Inst, unsigned RegNo,
 		uint64_t Address, void *Decoder)
 {
+    uint16_t Register;
+
 	if (RegNo > 31)
 		return MCDisassembler_Fail;
 
-	uint16_t Register = getReg(Decoder, AArch64_FPR128RegClassID, RegNo);
+	Register = getReg(Decoder, AArch64_FPR128RegClassID, RegNo);
 	MCInst_addOperand(Inst, MCOperand_CreateReg(Register));
 	return MCDisassembler_Success;
 }
@@ -438,10 +461,12 @@ static DecodeStatus DecodeGPR64noxzrRegisterClass(MCInst *Inst,
 		uint64_t Address,
 		void *Decoder)
 {
+    uint16_t Register;
+
 	if (RegNo > 30)
 		return MCDisassembler_Fail;
 
-	uint16_t Register = getReg(Decoder, AArch64_GPR64noxzrRegClassID, RegNo);
+	Register = getReg(Decoder, AArch64_GPR64noxzrRegClassID, RegNo);
 	MCInst_addOperand(Inst, MCOperand_CreateReg(Register));
 	return MCDisassembler_Success;
 }
@@ -450,10 +475,12 @@ static DecodeStatus DecodeRegisterClassByID(MCInst *Inst, unsigned RegNo,
 		unsigned RegID,
 		void *Decoder)
 {
+    uint16_t Register;
+
 	if (RegNo > 31)
 		return MCDisassembler_Fail;
 
-	uint16_t Register = getReg(Decoder, RegID, RegNo);
+	Register = getReg(Decoder, RegID, RegNo);
 	MCInst_addOperand(Inst, MCOperand_CreateReg(Register));
 	return MCDisassembler_Success;
 }