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mtd: spi-nor: intel-spi: Avoid crossing 4K address boundary on read/w…
…rite commit 2b75ebe upstream. It was observed that reads crossing 4K address boundary are failing. This limitation is mentioned in Intel documents: Intel(R) 9 Series Chipset Family Platform Controller Hub (PCH) Datasheet: "5.26.3 Flash Access Program Register Access: * Program Register Accesses are not allowed to cross a 4 KB boundary..." Enhanced Serial Peripheral Interface (eSPI) Interface Base Specification (for Client and Server Platforms): "5.1.4 Address For other memory transactions, the address may start or end at any byte boundary. However, the address and payload length combination must not cross the naturally aligned address boundary of the corresponding Maximum Payload Size. It must not cross a 4 KB address boundary." Avoid this by splitting an operation crossing the boundary into two operations. Fixes: 8afda8b ("spi-nor: Add support for Intel SPI serial flash controller") Cc: [email protected] Reported-by: Romain Porte <[email protected]> Tested-by: Pascal Fabreges <[email protected]> Signed-off-by: Alexander Sverdlin <[email protected]> Reviewed-by: Tudor Ambarus <[email protected]> Acked-by: Mika Westerberg <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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