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Refactoring and Makefile Changes
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Exposed a bunch of warnings, fix of those comes next
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primis committed Apr 7, 2019
1 parent 2c128fb commit 6037ca2
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Showing 54 changed files with 938 additions and 889 deletions.
2 changes: 2 additions & 0 deletions .gitignore
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# Build Directory
build*/
64 changes: 46 additions & 18 deletions Makefile
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# Scorch OS 2008-2010 Scorch OS Developers

# Makefile for Compiling the Base Kernel
# Requirements are nasm, and a i586 cross compiler
# Directions to download is at http://wiki.osdev.org/GCC_Cross-Compiler_on_Debian_Linux

C_COMPILER=i686-elf-gcc
ASM_COMPILER=nasm
LINKER=i686-elf-ld
# These aren't "real" targets
.PHONY: all clean link

# This can be overridden by a user
BUILD_DIR ?= build

CWARNINGS := -Wall -Wextra
CFLAGS := -I./src/include -std=gnu99 -fleading-underscore -O -finline-functions-called-once

# In Case we ever wanna make for another platform
TARGET ?= x86

# We need lowercase for the name, just be sure with a `tr`
TARGETL != echo $(TARGET) | tr '[:upper:]' '[:lower:]'

BUILD := $(BUILD_DIR)-$(TARGETL)

CFLAGS=-I./src/include -std=gnu99 -fleading-underscore -O -ffreestanding -finline-functions-called-once -nostdlib -Werror=implicit-function-declaration
LDFLAGS=-T./src/link.ld
ASFLAGS=-felf -I$(CURDIR)/src/
# Include the sub-makefile
-include target-$(TARGETL).mk

C_SOURCES = $(shell ls src/*.c)
ASM_SOURCES = $(shell ls src/*.s)
OBJECTS = $(ASM_SOURCES:.s=.o) $(C_SOURCES:.c=.o)
# Rewrite paths into the build directory
C_SOURCES != find src/core -type f -name '*.c'
C_SOURCES += $(TARGET_CSOURCES)
C_OBJECTS := $(patsubst %.c,$(BUILD)/%.c.o,$(C_SOURCES))
ASM_OBJECTS := $(patsubst %.s,$(BUILD)/%.s.o,$(ASM_SOURCES))

OBJECTS := $(C_OBJECTS) $(ASM_OBJECTS)

# All of the directories we need for the build
SRC_DIR != find src/ -type d | tr '\n' ' '

all: $(OBJECTS) link

clean:
-rm ./src/*.o
link:
$(LINKER) $(LDFLAGS) -o bin/kernel.x $(OBJECTS)
.c.o:
$(C_COMPILER) $(CFLAGS) -c $< -o $@

.s.o:
$(ASM_COMPILER) $(ASFLAGS) $< -o $@
@printf "\033[1mCLEAN\033[0m \n"
@find $(BUILD) -type f -name '*.o' -exec rm {} +

# $(CC) is a perfectly good linker, no need to use ld
link: $(OBJECTS)
@printf "\033[1mLINK\033[0m $@\n"
@$(CC) $(TARGET_CFLAGS) $(CFLAGS) $(CWARNINGS) $(LDFLAGS) -o./bin/$(BIN) $(OBJECTS)

# Set up build directories
$(BUILD)/%.c.o: %.c Makefile | setup_build_dir
@printf "\033[1mCC\033[0m $@\n"
@$(CC) $(TARGET_CFLAGS) $(CWARNINGS) $(CFLAGS) -c $< -o $@

setup_build_dir:
@mkdir -p $(BUILD)
@cd $(BUILD) && mkdir -p `echo $(SRC_DIR)`
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