Fix SPI so that SPI4 Clock will not be 2 times requested

The clocks assigned to the SPI blocks spi4 to spi6  were using the APB1 prescaler (42 mHZ) constant and should have been the APB2 prescaler (84 mHZ) constant. Thus the actual SPI clock on the bus was 2 times what is should have been (After adjustment for requested to actual)

IE: Request for 11 mHz maps to an Actual 10.5 mHz but would have produced a clock of 21 mHz on the bus.

This change fixes that.

arch/arm/src/stm32/stm32_spi.c

@@ -406,7 +406,7 @@ static struct stm32_spidev_s g_spi4dev =
 {
   .spidev   = { &g_sp4iops },
   .spibase  = STM32_SPI4_BASE,
-  .spiclock = STM32_PCLK1_FREQUENCY,
+  .spiclock = STM32_PCLK2_FREQUENCY,
 #ifdef CONFIG_STM32_SPI_INTERRUPTS
   .spiirq   = STM32_IRQ_SPI4,
 #endif
@@ -445,7 +445,7 @@ static struct stm32_spidev_s g_spi5dev =
 {
   .spidev   = { &g_sp5iops },
   .spibase  = STM32_SPI5_BASE,
-  .spiclock = STM32_PCLK1_FREQUENCY,
+  .spiclock = STM32_PCLK2_FREQUENCY,
 #ifdef CONFIG_STM32_SPI_INTERRUPTS
   .spiirq   = STM32_IRQ_SPI5,
 #endif
@@ -484,7 +484,7 @@ static struct stm32_spidev_s g_spi6dev =
 {
   .spidev   = { &g_sp6iops },
   .spibase  = STM32_SPI6_BASE,
-  .spiclock = STM32_PCLK1_FREQUENCY,
+  .spiclock = STM32_PCLK2_FREQUENCY,
 #ifdef CONFIG_STM32_SPI_INTERRUPTS
   .spiirq   = STM32_IRQ_SPI6,
 #endif