Merge pull request PX4#46 from PX4/spi_setup_fix

Spi setup fix
priseborough · Feb 17, 2015 · f8acf17 · f8acf17
2 parents 716a2e2 + db6189e
commit f8acf17
Showing 1 changed file with 8 additions and 4 deletions.
diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c
@@ -1035,7 +1035,9 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
           actual = priv->spiclock >> 8;
         }
 
+      spi_modifycr1(priv, 0, SPI_CR1_SPE);
       spi_modifycr1(priv, setbits, SPI_CR1_BR_MASK);
+      spi_modifycr1(priv, SPI_CR1_SPE, 0);
 
       /* Save the frequency selection so that subsequent reconfigurations will be
        * faster.
@@ -1110,9 +1112,11 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
           return;
         }
 
-        spi_modifycr1(priv, setbits, clrbits);
+      spi_modifycr1(priv, 0, SPI_CR1_SPE);
+      spi_modifycr1(priv, setbits, clrbits);
+      spi_modifycr1(priv, SPI_CR1_SPE, 0);
 
-        /* Save the mode so that subsequent re-configurations will be faster */
+      /* Save the mode so that subsequent re-configurations will be faster */
 
 #ifndef CONFIG_SPI_OWNBUS
         priv->mode = mode;
@@ -1155,12 +1159,12 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
         {
         case 8:
           setbits = 0;
-          clrbits = SPI_CR1_DFF;
+          clrbits = SPI_CR1_DFF|SPI_CR1_LSBFIRST;
           break;
 
         case 16:
           setbits = SPI_CR1_DFF;
-          clrbits = 0;
+          clrbits = SPI_CR1_LSBFIRST;
           break;
 
         default: