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tests/kernel/usage/thread_runtime_stats: relax precision test for RISC-V
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This commit relaxes the precision requirements for idle event statistic
test when RISC-V machine timer driver is used. This is needed for some
platforms (e.g. hifive1), for which the cycle count is too low to pass
the checks where a percent deviation of peak cycles count is allowed.

Signed-off-by: Filip Kokosinski <[email protected]>
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fkokosinski authored and nashif committed Jun 13, 2022
1 parent c4d71b3 commit 06615c1
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Showing 2 changed files with 7 additions and 2 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,11 @@
((((val1) * 100) < ((val2) * (100 + (pcnt)))) && \
(((val1) * 100) > ((val2) * (100 - (pcnt))))) ? true : false

#if defined(CONFIG_RISCV_MACHINE_TIMER)
#define IDLE_EVENT_STATS_PRECISION 5
#else
#define IDLE_EVENT_STATS_PRECISION 1
#endif

static struct k_thread helper_thread;
static K_THREAD_STACK_DEFINE(helper_stack, HELPER_STACK_SIZE);
Expand Down Expand Up @@ -162,7 +167,7 @@ void test_all_stats_usage(void)
zassert_true(stats5.current_cycles > stats4.current_cycles, NULL);

zassert_true(TEST_WITHIN_X_PERCENT(stats4.peak_cycles,
stats3.peak_cycles, 1), NULL);
stats3.peak_cycles, IDLE_EVENT_STATS_PRECISION), NULL);
zassert_true(stats4.peak_cycles == stats5.peak_cycles, NULL);

zassert_true(stats4.average_cycles > stats3.average_cycles, NULL);
Expand Down
2 changes: 1 addition & 1 deletion tests/kernel/usage/thread_runtime_stats/testcase.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,6 @@ tests:
# The following architectures are exluded as the necessary
# thread runtime statistic hooks do not yet exist.
# mips
arch_exclude: posix riscv32 sparc mips
arch_exclude: posix sparc mips
# SMP is excluded as the test was only written for UP
filter: not CONFIG_SMP

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