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Commits on Jan 23, 2018

• [X86] Don't reorder (srl (and X, C1), C2) if (and X, C1) can be matched as a movzx

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• [X86] Remove 'NOREX' comment from the printing of _NOREX instructions.

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• [X86] Various vXi1 insertion improvements.

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Commits on Jan 20, 2018

• [X86] Add an override of targetShrinkDemandedConstant to limit the damage that shrinkdemandedbits can do to zext_in_reg operations

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• [X86] Add some more v32i1 shuffle tests with shuffles between mask creation and mask usage rather than being just shuffling input arguments.

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• [X86] Add test cases for failures to use movzx due to various issues with demanded bits.

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• [X86] Teach X86 codegen to use vector width preference to avoid promoting to 512-bit types when VLX is enabled and the preference is for a smaller size.

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• [X86] Add support for passing 'prefer-vector-width' function attribute into X86Subtarget and exposing via X86's getRegisterWidth TTI interface.

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Commits on Jan 19, 2018

• [X86] Autogenerate complete checks on a couple tests. NFC

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• [X86] Make better use of instregex for cmovcc/setcc/jcc instructions in the Intel scheduler models.

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Commits on Jan 18, 2018

• [X86] Add intrinsic support for the RDPID instruction

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• [X86] Use vmovdqu64/vmovdqa64 for unmasked integer vector stores for consistency with loads.

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• [X86] Remove isel patterns for using unmasked vmovdqa32/vmovdqu32 for integer vector loads.

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• [X86] Remove windows line endings from a test file. NFC

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• [DAGCombiner] Add a DAG combine to turn a splat build_vector where the splat elemnt is a bitcast from a vector type into a concat_vector

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Commits on Jan 17, 2018

• [X86] Teach LowerBUILD_VECTOR to recognize pair-wise splats of 32-bit elements and use a 64-bit broadcast

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• [X86] When legalizing (v64i1 select i8, v64i1, v64i1) make sure not to introduce bitcasts to i64 in 32-bit mode

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• [X86] In LowerBUILD_VECTOR, rename ExtVT to EltVT so it makes sense.

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• [X86] Remove duplicate lines from scheduler models. NFC

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Commits on Jan 16, 2018

• [X86] Revisit the fix I made years ago to make 'xchgl %eax, %eax' not encode using the 0x90 encoding in 64-bit mode.

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• [X86] Make 'xchgq %rax, %rax' an alias for the 0x90 nop encoding to match gas.

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Commits on Jan 15, 2018

• [X86] Use MVT::getVectorVT instead of EVT::getVectorVT when splitting 256/512 bit build_vectors. NFC

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• [X86] Generalize some code in LowerBUILD_VECTOR. NFC

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• [X86] Remove unnecessary if statement from LowerBUILD_VECTOR. NFCI

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Commits on Jan 14, 2018

• [X86] Add test cases for D41794.

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• [X86] Autoupgrade kunpck intrinsics using vector operations instead of scalar operations

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• [X86] Use ISD::TRUNCATE instead of X86ISD::VTRUNC when input and output types have the same number of elements.

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• [X86] Add X86ISD::VTRUNC to computeKnownBitsForTargetNode.

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• [X86] Improve legalization of vXi16/vXi8 selects.

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• [X86] Add an avx512bw command line to the avx512-vec-cmp.ll test. Add some additional test cases.

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Commits on Jan 13, 2018

• [X86] Add DAG combine to promote vXi1 result of a vXi8/vXi16 setcc when we have AVX512 but not BWI.

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Commits on Jan 12, 2018

• [X86] Remove unused isel pattern for zero extend from v16i1/v8i1 to v16i32/v8i64.

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• [X86] Don't allow lods/stos/scas/cmps/movs to be parsed without a suffix and only memory operand in at&t syntax.

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• [X86] Don't require suffix on 'clr' mnemonic in intel syntax

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• [X86] Add 'l' and 'q' suffixes to the tbm instruction mnemonics.

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