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Remove uses of builtin comma operator.
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Cleanup for upcoming Clang warning -Wcomma.  No functionality change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261270 91177308-0d34-0410-b5e6-96231b3b80d8
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Weverything committed Feb 18, 2016
1 parent e172bc7 commit 1b96cbe
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Showing 35 changed files with 329 additions and 187 deletions.
3 changes: 2 additions & 1 deletion lib/Analysis/BasicAliasAnalysis.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1554,7 +1554,8 @@ bool BasicAAResult::constantOffsetHeuristic(
unsigned V0ZExtBits = 0, V0SExtBits = 0, V1ZExtBits = 0, V1SExtBits = 0;
const Value *V0 = GetLinearExpression(Var0.V, V0Scale, V0Offset, V0ZExtBits,
V0SExtBits, DL, 0, AC, DT, NSW, NUW);
NSW = true, NUW = true;
NSW = true;
NUW = true;
const Value *V1 = GetLinearExpression(Var1.V, V1Scale, V1Offset, V1ZExtBits,
V1SExtBits, DL, 0, AC, DT, NSW, NUW);

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6 changes: 4 additions & 2 deletions lib/Analysis/LoopAccessAnalysis.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1325,8 +1325,10 @@ bool MemoryDepChecker::areDepsSafe(DepCandidates &AccessSets,
AccessSets.findValue(AccessSets.getLeaderValue(CurAccess));

// Check accesses within this set.
EquivalenceClasses<MemAccessInfo>::member_iterator AI, AE;
AI = AccessSets.member_begin(I), AE = AccessSets.member_end();
EquivalenceClasses<MemAccessInfo>::member_iterator AI =
AccessSets.member_begin(I);
EquivalenceClasses<MemAccessInfo>::member_iterator AE =
AccessSets.member_end();

// Check every access pair.
while (AI != AE) {
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9 changes: 6 additions & 3 deletions lib/Analysis/ValueTracking.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1024,7 +1024,8 @@ static void computeKnownBitsFromShiftOperator(Operator *I,

// It would be more-clearly correct to use the two temporaries for this
// calculation. Reusing the APInts here to prevent unnecessary allocations.
KnownZero.clearAllBits(), KnownOne.clearAllBits();
KnownZero.clearAllBits();
KnownOne.clearAllBits();

// If we know the shifter operand is nonzero, we can sometimes infer more
// known bits. However this is expensive to compute, so be lazy about it and
Expand Down Expand Up @@ -1069,8 +1070,10 @@ static void computeKnownBitsFromShiftOperator(Operator *I,
// return anything we'd like, but we need to make sure the sets of known bits
// stay disjoint (it should be better for some other code to actually
// propagate the undef than to pick a value here using known bits).
if ((KnownZero & KnownOne) != 0)
KnownZero.clearAllBits(), KnownOne.clearAllBits();
if ((KnownZero & KnownOne) != 0) {
KnownZero.clearAllBits();
KnownOne.clearAllBits();
}
}

static void computeKnownBitsFromOperator(Operator *I, APInt &KnownZero,
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12 changes: 8 additions & 4 deletions lib/CodeGen/CalcSpillWeights.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -192,11 +192,15 @@ VirtRegAuxInfo::calculateSpillWeightAndHint(LiveInterval &li) {
// FIXME: we probably shouldn't use floats at all.
volatile float hweight = Hint[hint] += weight;
if (TargetRegisterInfo::isPhysicalRegister(hint)) {
if (hweight > bestPhys && mri.isAllocatable(hint))
bestPhys = hweight, hintPhys = hint;
if (hweight > bestPhys && mri.isAllocatable(hint)) {
bestPhys = hweight;
hintPhys = hint;
}
} else {
if (hweight > bestVirt)
bestVirt = hweight, hintVirt = hint;
if (hweight > bestVirt) {
bestVirt = hweight;
hintVirt = hint;
}
}
}

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18 changes: 12 additions & 6 deletions lib/CodeGen/LiveDebugVariables.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -172,8 +172,10 @@ class UserValue {
return L1;
// Splice L2 before L1's members.
UserValue *End = L2;
while (End->next)
End->leader = L1, End = End->next;
while (End->next) {
End->leader = L1;
End = End->next;
}
End->leader = L1;
End->next = L1->next;
L1->next = L2;
Expand Down Expand Up @@ -554,8 +556,10 @@ void UserValue::extendDef(SlotIndex Idx, unsigned LocNo, LiveRange *LR,
Kills->push_back(Start);
return;
}
if (Segment->end < Stop)
Stop = Segment->end, ToEnd = false;
if (Segment->end < Stop) {
Stop = Segment->end;
ToEnd = false;
}
}

// There could already be a short def at Start.
Expand All @@ -569,8 +573,10 @@ void UserValue::extendDef(SlotIndex Idx, unsigned LocNo, LiveRange *LR,
}

// Limited by the next def.
if (I.valid() && I.start() < Stop)
Stop = I.start(), ToEnd = false;
if (I.valid() && I.start() < Stop) {
Stop = I.start();
ToEnd = false;
}
// Limited by VNI's live range.
else if (!ToEnd && Kills)
Kills->push_back(Stop);
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8 changes: 5 additions & 3 deletions lib/CodeGen/LiveInterval.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -309,10 +309,12 @@ LiveRange::iterator LiveRange::find(SlotIndex Pos) {
size_t Len = size();
do {
size_t Mid = Len >> 1;
if (Pos < I[Mid].end)
if (Pos < I[Mid].end) {
Len = Mid;
else
I += Mid + 1, Len -= Mid + 1;
} else {
I += Mid + 1;
Len -= Mid + 1;
}
} while (Len);
return I;
}
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6 changes: 4 additions & 2 deletions lib/CodeGen/MachineInstr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1234,8 +1234,10 @@ const TargetRegisterClass *MachineInstr::getRegClassConstraintEffect(
unsigned MachineInstr::getBundleSize() const {
MachineBasicBlock::const_instr_iterator I = getIterator();
unsigned Size = 0;
while (I->isBundledWithSucc())
++Size, ++I;
while (I->isBundledWithSucc()) {
++Size;
++I;
}
return Size;
}

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3 changes: 2 additions & 1 deletion lib/CodeGen/MachineModuleInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -396,7 +396,8 @@ void MachineModuleInfo::TidyLandingPads(DenseMap<MCSymbol*, uintptr_t> *LPMap) {

LandingPad.BeginLabels.erase(LandingPad.BeginLabels.begin() + j);
LandingPad.EndLabels.erase(LandingPad.EndLabels.begin() + j);
--j, --e;
--j;
--e;
}

// Remove landing pads with no try-ranges.
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6 changes: 4 additions & 2 deletions lib/CodeGen/MachineSink.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -344,8 +344,10 @@ bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) {
continue;
}

if (SinkInstruction(MI, SawStore, AllSuccessors))
++NumSunk, MadeChange = true;
if (SinkInstruction(MI, SawStore, AllSuccessors)) {
++NumSunk;
MadeChange = true;
}

// If we just processed the first instruction in the block, we're done.
} while (!ProcessedBegin);
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12 changes: 8 additions & 4 deletions lib/CodeGen/MachineTraceMetrics.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -328,8 +328,10 @@ MinInstrCountEnsemble::pickTracePred(const MachineBasicBlock *MBB) {
continue;
// Pick the predecessor that would give this block the smallest InstrDepth.
unsigned Depth = PredTBI->InstrDepth + CurCount;
if (!Best || Depth < BestDepth)
Best = Pred, BestDepth = Depth;
if (!Best || Depth < BestDepth) {
Best = Pred;
BestDepth = Depth;
}
}
return Best;
}
Expand All @@ -356,8 +358,10 @@ MinInstrCountEnsemble::pickTraceSucc(const MachineBasicBlock *MBB) {
continue;
// Pick the successor that would give this block the smallest InstrHeight.
unsigned Height = SuccTBI->InstrHeight;
if (!Best || Height < BestHeight)
Best = Succ, BestHeight = Height;
if (!Best || Height < BestHeight) {
Best = Succ;
BestHeight = Height;
}
}
return Best;
}
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32 changes: 20 additions & 12 deletions lib/CodeGen/RegAllocGreedy.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -954,22 +954,28 @@ bool RAGreedy::addSplitConstraints(InterferenceCache::Cursor Intf,

// Interference for the live-in value.
if (BI.LiveIn) {
if (Intf.first() <= Indexes->getMBBStartIdx(BC.Number))
BC.Entry = SpillPlacement::MustSpill, ++Ins;
else if (Intf.first() < BI.FirstInstr)
BC.Entry = SpillPlacement::PrefSpill, ++Ins;
else if (Intf.first() < BI.LastInstr)
if (Intf.first() <= Indexes->getMBBStartIdx(BC.Number)) {
BC.Entry = SpillPlacement::MustSpill;
++Ins;
} else if (Intf.first() < BI.FirstInstr) {
BC.Entry = SpillPlacement::PrefSpill;
++Ins;
} else if (Intf.first() < BI.LastInstr) {
++Ins;
}
}

// Interference for the live-out value.
if (BI.LiveOut) {
if (Intf.last() >= SA->getLastSplitPoint(BC.Number))
BC.Exit = SpillPlacement::MustSpill, ++Ins;
else if (Intf.last() > BI.LastInstr)
BC.Exit = SpillPlacement::PrefSpill, ++Ins;
else if (Intf.last() > BI.FirstInstr)
if (Intf.last() >= SA->getLastSplitPoint(BC.Number)) {
BC.Exit = SpillPlacement::MustSpill;
++Ins;
} else if (Intf.last() > BI.LastInstr) {
BC.Exit = SpillPlacement::PrefSpill;
++Ins;
} else if (Intf.last() > BI.FirstInstr) {
++Ins;
}
}

// Accumulate the total frequency of inserted spill code.
Expand Down Expand Up @@ -1392,8 +1398,10 @@ unsigned RAGreedy::calculateRegionSplitCost(LiveInterval &VirtReg,
if (i == BestCand || !GlobalCand[i].PhysReg)
continue;
unsigned Count = GlobalCand[i].LiveBundles.count();
if (Count < WorstCount)
Worst = i, WorstCount = Count;
if (Count < WorstCount) {
Worst = i;
WorstCount = Count;
}
}
--NumCands;
GlobalCand[Worst] = GlobalCand[NumCands];
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44 changes: 26 additions & 18 deletions lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -677,25 +677,33 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
// now, just use the tightest assertzext/assertsext possible.
bool isSExt = true;
EVT FromVT(MVT::Other);
if (NumSignBits == RegSize)
isSExt = true, FromVT = MVT::i1; // ASSERT SEXT 1
else if (NumZeroBits >= RegSize-1)
isSExt = false, FromVT = MVT::i1; // ASSERT ZEXT 1
else if (NumSignBits > RegSize-8)
isSExt = true, FromVT = MVT::i8; // ASSERT SEXT 8
else if (NumZeroBits >= RegSize-8)
isSExt = false, FromVT = MVT::i8; // ASSERT ZEXT 8
else if (NumSignBits > RegSize-16)
isSExt = true, FromVT = MVT::i16; // ASSERT SEXT 16
else if (NumZeroBits >= RegSize-16)
isSExt = false, FromVT = MVT::i16; // ASSERT ZEXT 16
else if (NumSignBits > RegSize-32)
isSExt = true, FromVT = MVT::i32; // ASSERT SEXT 32
else if (NumZeroBits >= RegSize-32)
isSExt = false, FromVT = MVT::i32; // ASSERT ZEXT 32
else
if (NumSignBits == RegSize) {
isSExt = true; // ASSERT SEXT 1
FromVT = MVT::i1;
} else if (NumZeroBits >= RegSize - 1) {
isSExt = false; // ASSERT ZEXT 1
FromVT = MVT::i1;
} else if (NumSignBits > RegSize - 8) {
isSExt = true; // ASSERT SEXT 8
FromVT = MVT::i8;
} else if (NumZeroBits >= RegSize - 8) {
isSExt = false; // ASSERT ZEXT 8
FromVT = MVT::i8;
} else if (NumSignBits > RegSize - 16) {
isSExt = true; // ASSERT SEXT 16
FromVT = MVT::i16;
} else if (NumZeroBits >= RegSize - 16) {
isSExt = false; // ASSERT ZEXT 16
FromVT = MVT::i16;
} else if (NumSignBits > RegSize - 32) {
isSExt = true; // ASSERT SEXT 32
FromVT = MVT::i32;
} else if (NumZeroBits >= RegSize - 32) {
isSExt = false; // ASSERT ZEXT 32
FromVT = MVT::i32;
} else {
continue;

}
// Add an assertion node.
assert(FromVT != MVT::Other);
Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl,
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6 changes: 4 additions & 2 deletions lib/CodeGen/SelectionDAG/TargetLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2268,8 +2268,10 @@ void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
C = dyn_cast<ConstantSDNode>(Op.getOperand(0));
GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(1));
}
if (!C || !GA)
C = nullptr, GA = nullptr;
if (!C || !GA) {
C = nullptr;
GA = nullptr;
}
}

// If we find a valid operand, map to the TargetXXX version so that the
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14 changes: 10 additions & 4 deletions lib/IR/Function.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -882,11 +882,17 @@ bool Function::hasAddressTaken(const User* *PutOffender) const {
const User *FU = U.getUser();
if (isa<BlockAddress>(FU))
continue;
if (!isa<CallInst>(FU) && !isa<InvokeInst>(FU))
return PutOffender ? (*PutOffender = FU, true) : true;
if (!isa<CallInst>(FU) && !isa<InvokeInst>(FU)) {
if (PutOffender)
*PutOffender = FU;
return true;
}
ImmutableCallSite CS(cast<Instruction>(FU));
if (!CS.isCallee(&U))
return PutOffender ? (*PutOffender = FU, true) : true;
if (!CS.isCallee(&U)) {
if (PutOffender)
*PutOffender = FU;
return true;
}
}
return false;
}
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