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AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize for consi…
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…stency

Differential Revision: https://reviews.llvm.org/D38957


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316097 91177308-0d34-0410-b5e6-96231b3b80d8
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kzhuravl committed Oct 18, 2017
1 parent afea6f4 commit 28cb790
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Showing 8 changed files with 16 additions and 16 deletions.
4 changes: 2 additions & 2 deletions docs/AMDGPUUsage.rst
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Expand Up @@ -1208,7 +1208,7 @@ non-AMD key names should be prefixed by "*vendor-name*.".
registers used by
each work-item for
GFX6-GFX9
"MaxFlatWorkgroupSize" integer Maximum flat
"MaxFlatWorkGroupSize" integer Maximum flat
work-group size
supported by the
kernel in work-items.
Expand Down Expand Up @@ -1451,7 +1451,7 @@ CP microcode requires the Kernel descritor to be allocated on 64 byte alignment.
then additional space must
be added to this value for
the call stack.
95:64 4 bytes MaxFlatWorkgroupSize Maximum flat work-group
95:64 4 bytes MaxFlatWorkGroupSize Maximum flat work-group
size supported by the
kernel in work-items.
96 1 bit IsDynamicCallStack Indicates if the generated
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2 changes: 1 addition & 1 deletion include/llvm/Support/AMDGPUKernelDescriptor.h
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Expand Up @@ -109,7 +109,7 @@ enum ComputePgmRsrc2 {
struct KernelDescriptor final {
uint32_t GroupSegmentFixedSize;
uint32_t PrivateSegmentFixedSize;
uint32_t MaxFlatWorkgroupSize;
uint32_t MaxFlatWorkGroupSize;
uint64_t IsDynamicCallStack : 1;
uint64_t IsXNACKEnabled : 1;
uint64_t Reserved0 : 30;
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6 changes: 3 additions & 3 deletions include/llvm/Support/AMDGPUMetadata.h
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Expand Up @@ -238,8 +238,8 @@ constexpr char WavefrontSize[] = "WavefrontSize";
constexpr char NumSGPRs[] = "NumSGPRs";
/// \brief Key for Kernel::CodeProps::Metadata::mNumVGPRs.
constexpr char NumVGPRs[] = "NumVGPRs";
/// \brief Key for Kernel::CodeProps::Metadata::mMaxFlatWorkgroupSize.
constexpr char MaxFlatWorkgroupSize[] = "MaxFlatWorkgroupSize";
/// \brief Key for Kernel::CodeProps::Metadata::mMaxFlatWorkGroupSize.
constexpr char MaxFlatWorkGroupSize[] = "MaxFlatWorkGroupSize";
/// \brief Key for Kernel::CodeProps::Metadata::mIsDynamicCallStack.
constexpr char IsDynamicCallStack[] = "IsDynamicCallStack";
/// \brief Key for Kernel::CodeProps::Metadata::mIsXNACKEnabled.
Expand Down Expand Up @@ -268,7 +268,7 @@ struct Metadata final {
/// \brief Total number of VGPRs used by a workitem. Optional.
uint16_t mNumVGPRs = 0;
/// \brief Maximum flat work-group size supported by the kernel. Optional.
uint32_t mMaxFlatWorkgroupSize = 0;
uint32_t mMaxFlatWorkGroupSize = 0;
/// \brief True if the generated machine code is using a dynamically sized
/// call stack. Optional.
bool mIsDynamicCallStack = false;
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4 changes: 2 additions & 2 deletions lib/Support/AMDGPUMetadata.cpp
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Expand Up @@ -142,8 +142,8 @@ struct MappingTraits<Kernel::CodeProps::Metadata> {
MD.mNumSGPRs, uint16_t(0));
YIO.mapOptional(Kernel::CodeProps::Key::NumVGPRs,
MD.mNumVGPRs, uint16_t(0));
YIO.mapOptional(Kernel::CodeProps::Key::MaxFlatWorkgroupSize,
MD.mMaxFlatWorkgroupSize, uint32_t(0));
YIO.mapOptional(Kernel::CodeProps::Key::MaxFlatWorkGroupSize,
MD.mMaxFlatWorkGroupSize, uint32_t(0));
YIO.mapOptional(Kernel::CodeProps::Key::IsDynamicCallStack,
MD.mIsDynamicCallStack, false);
YIO.mapOptional(Kernel::CodeProps::Key::IsXNACKEnabled,
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2 changes: 1 addition & 1 deletion lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
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Expand Up @@ -1179,7 +1179,7 @@ AMDGPU::HSAMD::Kernel::CodeProps::Metadata AMDGPUAsmPrinter::getHSACodeProps(
HSACodeProps.mWavefrontSize = STM.getWavefrontSize();
HSACodeProps.mNumSGPRs = CurrentProgramInfo.NumSGPR;
HSACodeProps.mNumVGPRs = CurrentProgramInfo.NumVGPR;
HSACodeProps.mMaxFlatWorkgroupSize = MFI.getMaxFlatWorkGroupSize();
HSACodeProps.mMaxFlatWorkGroupSize = MFI.getMaxFlatWorkGroupSize();
HSACodeProps.mIsDynamicCallStack = ProgramInfo.DynamicCallStack;
HSACodeProps.mIsXNACKEnabled = STM.isXNACKEnabled();

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8 changes: 4 additions & 4 deletions test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
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Expand Up @@ -133,10 +133,10 @@ attributes #3 = {"amdgpu-flat-work-group-size"="1024,2048"}
; HSAMD: Version: [ 1, 0 ]
; HSAMD: Kernels:
; HSAMD: - Name: min_64_max_64
; HSAMD: MaxFlatWorkgroupSize: 64
; HSAMD: MaxFlatWorkGroupSize: 64
; HSAMD: - Name: min_64_max_128
; HSAMD: MaxFlatWorkgroupSize: 128
; HSAMD: MaxFlatWorkGroupSize: 128
; HSAMD: - Name: min_128_max_128
; HSAMD: MaxFlatWorkgroupSize: 128
; HSAMD: MaxFlatWorkGroupSize: 128
; HSAMD: - Name: min_1024_max_2048
; HSAMD: MaxFlatWorkgroupSize: 2048
; HSAMD: MaxFlatWorkGroupSize: 2048
2 changes: 1 addition & 1 deletion test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
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Expand Up @@ -20,7 +20,7 @@
; GFX700: NumVGPRs: 4
; GFX800: NumVGPRs: 6
; GFX900: NumVGPRs: 6
; CHECK: MaxFlatWorkgroupSize: 256
; CHECK: MaxFlatWorkGroupSize: 256
define amdgpu_kernel void @test(
half addrspace(1)* %r,
half addrspace(1)* %a,
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4 changes: 2 additions & 2 deletions test/MC/AMDGPU/hsa-metadata-kernel-code-props.s
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Expand Up @@ -13,7 +13,7 @@
// CHECK: PrivateSegmentFixedSize: 16
// CHECK: KernargSegmentAlign: 16
// CHECK: WavefrontSize: 64
// CHECK: MaxFlatWorkgroupSize: 256
// CHECK: MaxFlatWorkGroupSize: 256
.amd_amdgpu_hsa_metadata
Version: [ 1, 0 ]
Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
Expand All @@ -26,5 +26,5 @@
PrivateSegmentFixedSize: 16
KernargSegmentAlign: 16
WavefrontSize: 64
MaxFlatWorkgroupSize: 256
MaxFlatWorkGroupSize: 256
.end_amd_amdgpu_hsa_metadata

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