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[RegisterScavenger] Remove aliasing registers of operands from the ca…
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…ndidate set

Summary:
In addition to not including the register operand of the current
instruction also don't include any aliasing registers. We can't consider
these as candidates because using them will clobber the corresponding
register operand of the current instruction.

This change doesn't include a test case and it would probably be difficult
to produce a stable one since the bug depends on the results of register
allocation.

Reviewers: MatzeB, qcolombet, hfinkel

Subscribers: hfinkel, llvm-commits

Differential Revision: https://reviews.llvm.org/D24130

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280698 91177308-0d34-0410-b5e6-96231b3b80d8
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sbaranga-arm committed Sep 6, 2016
1 parent 899add2 commit 4b1b5a4
Showing 1 changed file with 2 additions and 1 deletion.
3 changes: 2 additions & 1 deletion lib/CodeGen/RegisterScavenging.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -419,7 +419,8 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
for (const MachineOperand &MO : MI.operands()) {
if (MO.isReg() && MO.getReg() != 0 && !(MO.isUse() && MO.isUndef()) &&
!TargetRegisterInfo::isVirtualRegister(MO.getReg()))
Candidates.reset(MO.getReg());
for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI)
Candidates.reset(*AI);
}

// Try to find a register that's unused if there is one, as then we won't
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