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AMDGPU/MemoryModel: Fix monotonic atomic loads
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Those should have glc bit set for system and agent synchronization scopes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324314 91177308-0d34-0410-b5e6-96231b3b80d8
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kzhuravl committed Feb 6, 2018
1 parent 976af72 commit dd08ac8
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Showing 2 changed files with 4 additions and 3 deletions.
3 changes: 2 additions & 1 deletion lib/Target/AMDGPU/SIMemoryLegalizer.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -398,7 +398,8 @@ bool SIMemoryLegalizer::expandLoad(const SIMemOpInfo &MOI,
if (MOI.isAtomic()) {
if (MOI.getSSID() == SyncScope::System ||
MOI.getSSID() == MMI->getAgentSSID()) {
if (MOI.getOrdering() == AtomicOrdering::Acquire ||
if (MOI.getOrdering() == AtomicOrdering::Monotonic ||
MOI.getOrdering() == AtomicOrdering::Acquire ||
MOI.getOrdering() == AtomicOrdering::SequentiallyConsistent)
Changed |= enableGLCBit(MI);

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4 changes: 2 additions & 2 deletions test/CodeGen/AMDGPU/memory-legalizer-load.ll
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ entry:

; GCN-LABEL: {{^}}system_monotonic
; GCN-NOT: s_waitcnt vmcnt(0){{$}}
; GCN: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
; GCN: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}] glc{{$}}
; GCN-NOT: s_waitcnt vmcnt(0){{$}}
; GCN-NOT: buffer_wbinvl1_vol
; GCN: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
Expand Down Expand Up @@ -133,7 +133,7 @@ entry:

; GCN-LABEL: {{^}}agent_monotonic
; GCN-NOT: s_waitcnt vmcnt(0){{$}}
; GCN: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
; GCN: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}] glc{{$}}
; GCN-NOT: s_waitcnt vmcnt(0){{$}}
; GCN-NOT: buffer_wbinvl1_vol
; GCN: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
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