[Hexagon] Fix some Clang-tidy modernize and Include What You Use warn…

…ings; other minor fixes (NFC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314467 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Hexagon/HexagonBlockRanges.cpp

@@ -7,8 +7,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-#define DEBUG_TYPE "hbr"
-
 #include "HexagonBlockRanges.h"
 #include "HexagonInstrInfo.h"
 #include "HexagonSubtarget.h"
@@ -17,6 +15,7 @@
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineOperand.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/Support/Debug.h"
@@ -31,6 +30,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "hbr"
+
 bool HexagonBlockRanges::IndexRange::overlaps(const IndexRange &A) const {
   // If A contains start(), or "this" contains A.start(), then overlap.
   IndexType S = start(), E = end(), AS = A.start(), AE = A.end();

lib/Target/Hexagon/HexagonBlockRanges.h

@@ -1,16 +1,16 @@
-//===--- HexagonBlockRanges.h -----------------------------------*- C++ -*-===//
+//===- HexagonBlockRanges.h -------------------------------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
-#ifndef HEXAGON_BLOCK_RANGES_H
-#define HEXAGON_BLOCK_RANGES_H
+
+#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONBLOCKRANGES_H
+#define LLVM_LIB_TARGET_HEXAGON_HEXAGONBLOCKRANGES_H
 
 #include "llvm/ADT/BitVector.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
 #include <cassert>
 #include <map>
 #include <set>
@@ -23,6 +23,7 @@ class HexagonSubtarget;
 class MachineBasicBlock;
 class MachineFunction;
 class MachineInstr;
+class MachineRegisterInfo;
 class raw_ostream;
 class TargetInstrInfo;
 class TargetRegisterInfo;
@@ -32,11 +33,12 @@ struct HexagonBlockRanges {
 
   struct RegisterRef {
     unsigned Reg, Sub;
+
     bool operator<(RegisterRef R) const {
       return Reg < R.Reg || (Reg == R.Reg && Sub < R.Sub);
     }
   };
-  typedef std::set<RegisterRef> RegisterSet;
+  using RegisterSet = std::set<RegisterRef>;
 
   // This is to represent an "index", which is an abstraction of a position
   // of an instruction within a basic block.
@@ -49,7 +51,7 @@ struct HexagonBlockRanges {
       First = 11  // 10th + 1st
     };
 
-    IndexType() : Index(None) {}
+    IndexType() {}
     IndexType(unsigned Idx) : Index(Idx) {}
 
     static bool isInstr(IndexType X) { return X.Index >= First; }
@@ -68,7 +70,7 @@ struct HexagonBlockRanges {
     bool operator>  (IndexType Idx) const;
     bool operator>= (IndexType Idx) const;
 
-    unsigned Index;
+    unsigned Index = None;
   };
 
   // A range of indices, essentially a representation of a live range.
@@ -138,7 +140,8 @@ struct HexagonBlockRanges {
     std::map<IndexType,MachineInstr*> Map;
   };
 
-  typedef std::map<RegisterRef,RangeList> RegToRangeMap;
+  using RegToRangeMap = std::map<RegisterRef, RangeList>;
+
   RegToRangeMap computeLiveMap(InstrIndexMap &IndexMap);
   RegToRangeMap computeDeadMap(InstrIndexMap &IndexMap, RegToRangeMap &LiveMap);
   static RegisterSet expandToSubRegs(RegisterRef R,
@@ -241,4 +244,4 @@ raw_ostream &operator<< (raw_ostream &OS,
 
 } // end namespace llvm
 
-#endif // HEXAGON_BLOCK_RANGES_H
+#endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONBLOCKRANGES_H

lib/Target/Hexagon/HexagonCFGOptimizer.cpp

@@ -1,4 +1,5 @@
-//===-- HexagonCFGOptimizer.cpp - CFG optimizations -----------------------===//
+//===- HexagonCFGOptimizer.cpp - CFG optimizations ------------------------===//
+//
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
@@ -7,53 +8,54 @@
 //===----------------------------------------------------------------------===//
 
 #include "Hexagon.h"
-#include "HexagonMachineFunctionInfo.h"
-#include "HexagonSubtarget.h"
-#include "HexagonTargetMachine.h"
-#include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/MachineLoopInfo.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/MathExtras.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/Pass.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
+#include <cassert>
+#include <vector>
 
 using namespace llvm;
 
 #define DEBUG_TYPE "hexagon_cfg"
 
 namespace llvm {
-  FunctionPass *createHexagonCFGOptimizer();
-  void initializeHexagonCFGOptimizerPass(PassRegistry&);
-}
 
+FunctionPass *createHexagonCFGOptimizer();
+void initializeHexagonCFGOptimizerPass(PassRegistry&);
+
+} // end namespace llvm
 
 namespace {
 
 class HexagonCFGOptimizer : public MachineFunctionPass {
-
 private:
   void InvertAndChangeJumpTarget(MachineInstr &, MachineBasicBlock *);
   bool isOnFallThroughPath(MachineBasicBlock *MBB);
 
 public:
   static char ID;
+
   HexagonCFGOptimizer() : MachineFunctionPass(ID) {
     initializeHexagonCFGOptimizerPass(*PassRegistry::getPassRegistry());
   }
 
   StringRef getPassName() const override { return "Hexagon CFG Optimizer"; }
   bool runOnMachineFunction(MachineFunction &Fn) override;
+
   MachineFunctionProperties getRequiredProperties() const override {
     return MachineFunctionProperties().set(
         MachineFunctionProperties::Property::NoVRegs);
   }
 };
 
+} // end anonymous namespace
 
 char HexagonCFGOptimizer::ID = 0;
 
@@ -72,7 +74,6 @@ static bool IsConditionalBranch(int Opc) {
   return false;
 }
 
-
 static bool IsUnconditionalJump(int Opc) {
   return (Opc == Hexagon::J2_jump);
 }
@@ -86,19 +87,15 @@ void HexagonCFGOptimizer::InvertAndChangeJumpTarget(
   case Hexagon::J2_jumpt:
     NewOpcode = Hexagon::J2_jumpf;
     break;
-
   case Hexagon::J2_jumpf:
     NewOpcode = Hexagon::J2_jumpt;
     break;
-
   case Hexagon::J2_jumptnewpt:
     NewOpcode = Hexagon::J2_jumpfnewpt;
     break;
-
   case Hexagon::J2_jumpfnewpt:
     NewOpcode = Hexagon::J2_jumptnewpt;
     break;
-
   default:
     llvm_unreachable("Cannot handle this case");
   }
@@ -131,8 +128,6 @@ bool HexagonCFGOptimizer::runOnMachineFunction(MachineFunction &Fn) {
       MachineInstr &MI = *MII;
       int Opc = MI.getOpcode();
       if (IsConditionalBranch(Opc)) {
-
-        //
         // (Case 1) Transform the code if the following condition occurs:
         //   BB1: if (p0) jump BB3
         //   ...falls-through to BB2 ...
@@ -160,7 +155,6 @@ bool HexagonCFGOptimizer::runOnMachineFunction(MachineFunction &Fn) {
         //   Remove BB2
         //   BB3: ...
         //   BB4: ...
-        //
         unsigned NumSuccs = MBB->succ_size();
         MachineBasicBlock::succ_iterator SI = MBB->succ_begin();
         MachineBasicBlock* FirstSucc = *SI;
@@ -200,7 +194,7 @@ bool HexagonCFGOptimizer::runOnMachineFunction(MachineFunction &Fn) {
             // Check if the layout successor of BB2 is BB3.
             bool case1 = LayoutSucc->isLayoutSuccessor(JumpAroundTarget);
             bool case2 = JumpAroundTarget->isSuccessor(UncondTarget) &&
-              JumpAroundTarget->size() >= 1 &&
+              !JumpAroundTarget->empty() &&
               IsUnconditionalJump(JumpAroundTarget->back().getOpcode()) &&
               JumpAroundTarget->pred_size() == 1 &&
               JumpAroundTarget->succ_size() == 1;
@@ -223,11 +217,9 @@ bool HexagonCFGOptimizer::runOnMachineFunction(MachineFunction &Fn) {
                   UncondTarget->moveAfter(JumpAroundTarget);
               }
 
-              //
               // Correct live-in information. Is used by post-RA scheduler
               // The live-in to LayoutSucc is now all values live-in to
               // JumpAroundTarget.
-              //
               std::vector<MachineBasicBlock::RegisterMaskPair> OrigLiveIn(
                   LayoutSucc->livein_begin(), LayoutSucc->livein_end());
               std::vector<MachineBasicBlock::RegisterMaskPair> NewLiveIn(
@@ -245,8 +237,6 @@ bool HexagonCFGOptimizer::runOnMachineFunction(MachineFunction &Fn) {
   }
   return true;
 }
-}
-
 
 //===----------------------------------------------------------------------===//
 //                         Public Constructor Functions

lib/Target/Hexagon/HexagonGenExtract.cpp

@@ -1,4 +1,4 @@
-//===--- HexagonGenExtract.cpp --------------------------------------------===//
+//===- HexagonGenExtract.cpp ----------------------------------------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -8,7 +8,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/ADT/APInt.h"
-#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/GraphTraits.h"
 #include "llvm/IR/BasicBlock.h"
 #include "llvm/IR/CFG.h"
 #include "llvm/IR/Constants.h"
@@ -47,8 +47,8 @@ static cl::opt<bool> NeedAnd("extract-needand", cl::init(true), cl::Hidden,
 
 namespace llvm {
 
-  void initializeHexagonGenExtractPass(PassRegistry&);
-  FunctionPass *createHexagonGenExtract();
+void initializeHexagonGenExtractPass(PassRegistry&);
+FunctionPass *createHexagonGenExtract();
 
 } // end namespace llvm
 
@@ -58,7 +58,7 @@ namespace {
   public:
     static char ID;
 
-    HexagonGenExtract() : FunctionPass(ID), ExtractCount(0) {
+    HexagonGenExtract() : FunctionPass(ID) {
       initializeHexagonGenExtractPass(*PassRegistry::getPassRegistry());
     }
 
@@ -78,14 +78,14 @@ namespace {
     bool visitBlock(BasicBlock *B);
     bool convert(Instruction *In);
 
-    unsigned ExtractCount;
+    unsigned ExtractCount = 0;
     DominatorTree *DT;
   };
 
-  char HexagonGenExtract::ID = 0;
-
 } // end anonymous namespace
 
+char HexagonGenExtract::ID = 0;
+
 INITIALIZE_PASS_BEGIN(HexagonGenExtract, "hextract", "Hexagon generate "
   "\"extract\" instructions", false, false)
 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)