extend @op_str of cs_insn_flat following the core change

r41p41 · Jan 13, 2014 · 3d56b82 · 3d56b82
1 parent 22800aa
commit 3d56b82
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Showing 2 changed files with 3 additions and 2 deletions.
diff --git a/MCInst.h b/MCInst.h
@@ -108,7 +108,7 @@ typedef struct cs_insn_flat {
 
 	// Ascii text of instruction operands
 	// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
-	char op_str[96];
+	char op_str[136];
 
 	// NOTE: All information below is not available when CS_OPT_DETAIL = CS_OPT_OFF
 

diff --git a/arch/X86/X86IntelInstPrinter.c b/arch/X86/X86IntelInstPrinter.c
@@ -241,12 +241,13 @@ void X86_Intel_printInst(MCInst *MI, SStream *O, void *Info)
 			char *acc_regs[] = { "al", "ax", "eax", "rax", NULL };
 			int acc_regs_id[] = { X86_REG_AL,  X86_REG_AX, X86_REG_EAX, X86_REG_RAX };
 			if (tmp[0] != 0 && ((post = str_in_list(acc_regs, tmp)) != -1)) {
-				// set operand size following register size
+				// first op is register, so set operand size following register size
 				MI->flat_insn.x86.op_size = 1 << post;
 				// tmp is a register
 				if ((MI->flat_insn.x86.operands[0].type != X86_OP_INVALID) &&
 						((MI->flat_insn.x86.operands[0].type != X86_OP_REG) ||
 						(MI->flat_insn.x86.operands[0].reg != acc_regs_id[post]))) {
+					// first op is register, so insert its detail to position 0
 					int i;
 					for (i = MI->flat_insn.x86.op_count; i > 0; i--) {
 						memcpy(&(MI->flat_insn.x86.operands[i]), &(MI->flat_insn.x86.operands[i - 1]),