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Pasquale Davide Schiavone
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Aug 2, 2017
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlAxpy.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlAxpy "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlAxpy "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlBilat.c) | ||
|
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if (${RISCY_RV32F}) | ||
add_application(mlBilat "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlBilat "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlButter.c) | ||
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if (${RISCY_RV32F}) | ||
add_application(mlButter "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlButter "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlChol.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlChol "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlChol "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlDct.c) | ||
|
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if (${RISCY_RV32F}) | ||
add_application(mlDct "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlDct "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlDist.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlDist "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlDist "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlDotp.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlDotp "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlDotp "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlFir.c) | ||
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if (${RISCY_RV32F}) | ||
add_application(mlFir "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlFir "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlGemm.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlGemm "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlGemm "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlGemv.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlGemv "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlGemv "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlGivens.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlGivens "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlGivens "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlGrad.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlGrad "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlGrad "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlGradDir.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlGradDir "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlGradDir "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlHom.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlHom "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlHom "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlHomErr.c) | ||
|
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if (${RISCY_RV32F}) | ||
add_application(mlHomErr "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlHomErr "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlLog.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlLog "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlLog "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlQr.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlQr "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlQr "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlRbf.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlRbf "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlRbf "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlSchur.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlSchur "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlSchur "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlSin.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlSin "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlSin "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlSvd.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlSvd "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlSvd "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES mlWdotp.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(mlWdotp "${FP_SOURCES}" LABELS "ml_tests" "verilator_tests") | ||
add_application(mlWdotp "${FP_SOURCES}" LABELS "ml_tests") | ||
endif() |
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@@ -1 +1 @@ | ||
add_application(rv_basic basic.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(rv_basic basic.c LABELS "riscv_tests") |
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@@ -1,5 +1,5 @@ | ||
set_source_files_properties(tests.S PROPERTIES LANGUAGE C) | ||
|
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set(SOURCES test_print.c tests.S) | ||
add_application(rv_official "${SOURCES}" LABELS riscv_tests verilator_tests) | ||
add_application(rv_official "${SOURCES}" LABELS riscv_tests) | ||
#add_spi_regression(rv_official "${SOURCES}") |
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@@ -1 +1 @@ | ||
add_application(testALU testALU.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testALU testALU.c LABELS "riscv_tests") |
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@@ -1,3 +1,3 @@ | ||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(testALUExt testALUExt.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testALUExt testALUExt.c LABELS "riscv_tests") | ||
endif() |
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@@ -1,3 +1,3 @@ | ||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(testAddSubNorm testAddSubNorm.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testAddSubNorm testAddSubNorm.c LABELS "riscv_tests") | ||
endif() |
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@@ -1,3 +1,3 @@ | ||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(testBitManipulation testBitManipulation.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testBitManipulation testBitManipulation.c LABELS "riscv_tests") | ||
endif() |
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@@ -1 +1 @@ | ||
add_application(testCSR testCSR.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testCSR testCSR.c LABELS "riscv_tests") |
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@@ -1,3 +1,3 @@ | ||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(testClip testClip.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testClip testClip.c LABELS "riscv_tests") | ||
endif() |
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@@ -1,3 +1,3 @@ | ||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(testCnt testCnt.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testCnt testCnt.c LABELS "riscv_tests") | ||
endif() |
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Original file line number | Diff line number | Diff line change |
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@@ -1,3 +1,3 @@ | ||
if (${GCC_MARCH} MATCHES "RV32IM" OR ${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(testDivRem testDivRem.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testDivRem testDivRem.c LABELS "riscv_tests") | ||
endif() |
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Original file line number | Diff line number | Diff line change |
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@@ -1,3 +1,3 @@ | ||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(testDotMul testDotMul.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testDotMul testDotMul.c LABELS "riscv_tests") | ||
endif() |
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@@ -1 +1 @@ | ||
add_application(testEvents testEvents.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testEvents testEvents.c LABELS "riscv_tests") |
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@@ -1 +1 @@ | ||
add_application(testExceptions main.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testExceptions main.c LABELS "riscv_tests") |
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@@ -1,5 +1,5 @@ | ||
set(FP_SOURCES testFPU.c) | ||
|
||
if (${RISCY_RV32F}) | ||
add_application(testFPU "${FP_SOURCES}" LABELS "riscv_tests" "verilator_tests") | ||
add_application(testFPU "${FP_SOURCES}" LABELS "riscv_tests") | ||
endif() |
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@@ -1,3 +1,3 @@ | ||
if (${GCC_MARCH} MATCHES "RV32IM" OR ${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(testMUL testMUL.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testMUL testMUL.c LABELS "riscv_tests") | ||
endif() |
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@@ -1,3 +1,3 @@ | ||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(testMacNorm testMacNorm.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testMacNorm testMacNorm.c LABELS "riscv_tests") | ||
endif() |
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@@ -1,2 +1,2 @@ | ||
add_application(testMisaligned main.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testMisaligned main.c LABELS "riscv_tests") | ||
|
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@@ -1,3 +1,3 @@ | ||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(testShufflePack testShufflePack.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testShufflePack testShufflePack.c LABELS "riscv_tests") | ||
endif() |
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Original file line number | Diff line number | Diff line change |
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@@ -1,3 +1,3 @@ | ||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(testVecArith testVecArith.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testVecArith testVecArith.c LABELS "riscv_tests") | ||
endif() |
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Original file line number | Diff line number | Diff line change |
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@@ -1,3 +1,3 @@ | ||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(testVecCmp testVecCmp.c LABELS "riscv_tests" "verilator_tests") | ||
add_application(testVecCmp testVecCmp.c LABELS "riscv_tests") | ||
endif() |
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@@ -1 +1 @@ | ||
add_application(bitDescriptor bitDescriptor.c LABELS "sequential_tests" "verilator_tests") | ||
add_application(bitDescriptor bitDescriptor.c LABELS "sequential_tests") |
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@@ -1 +1 @@ | ||
add_application(bubblesort bubblesort.c LABELS "sequential_tests" "verilator_tests") | ||
add_application(bubblesort bubblesort.c LABELS "sequential_tests") |
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Original file line number | Diff line number | Diff line change |
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@@ -1,7 +1,7 @@ | ||
set(CNN_SOURCES cnn_layer.c cnn_kernels.c cnn_kernels_fused.c) | ||
|
||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(cnn_layer "${CNN_SOURCES}" FLAGS "-DPROFILE -DVEC" LABELS "sequential_tests" "verilator_tests") | ||
add_application(cnn_layer "${CNN_SOURCES}" FLAGS "-DPROFILE -DVEC" LABELS "sequential_tests") | ||
else() | ||
add_application(cnn_layer "${CNN_SOURCES}" FLAGS "-DPROFILE" LABELS "sequential_tests" "verilator_tests") | ||
add_application(cnn_layer "${CNN_SOURCES}" FLAGS "-DPROFILE" LABELS "sequential_tests") | ||
endif() |
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@@ -1,6 +1,6 @@ | ||
set(CONV_SOURCES convolution.c conv_kernels.c) | ||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(convolution "${CONV_SOURCES}" FLAGS "-DPROFILE -DDOTP" LABELS "sequential_tests" "verilator_tests") | ||
add_application(convolution "${CONV_SOURCES}" FLAGS "-DPROFILE -DDOTP" LABELS "sequential_tests") | ||
else() | ||
add_application(convolution "${CONV_SOURCES}" FLAGS "-DPROFILE" LABELS "sequential_tests" "verilator_tests") | ||
add_application(convolution "${CONV_SOURCES}" FLAGS "-DPROFILE" LABELS "sequential_tests") | ||
endif() |
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add_application(fibonacci fibonacci.c LABELS "sequential_tests" "verilator_tests") | ||
add_application(fibonacci fibonacci.c LABELS "sequential_tests") |
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@@ -1,9 +1,9 @@ | ||
add_application(matrixAdd32 matrixAdd.c LABELS "sequential_tests" "verilator_tests" FLAGS "-DWORD=32" SUBDIR "matrixAdd32") | ||
add_application(matrixAdd32 matrixAdd.c LABELS "sequential_tests" FLAGS "-DWORD=32" SUBDIR "matrixAdd32") | ||
|
||
if (${GCC_MARCH} MATCHES "[pulp]+") | ||
add_application(matrixAdd16 matrixAdd.c LABELS "sequential_tests" "verilator_tests" FLAGS "-DWORD=16 -DUSE_VEC" SUBDIR "matrixAdd16") | ||
add_application(matrixAdd8 matrixAdd.c LABELS "sequential_tests" "verilator_tests" FLAGS "-DWORD=8 -DUSE_VEC" SUBDIR "matrixAdd8") | ||
add_application(matrixAdd16 matrixAdd.c LABELS "sequential_tests" FLAGS "-DWORD=16 -DUSE_VEC" SUBDIR "matrixAdd16") | ||
add_application(matrixAdd8 matrixAdd.c LABELS "sequential_tests" FLAGS "-DWORD=8 -DUSE_VEC" SUBDIR "matrixAdd8") | ||
else() | ||
add_application(matrixAdd16 matrixAdd.c LABELS "sequential_tests" "verilator_tests" FLAGS "-DWORD=16" SUBDIR "matrixAdd16") | ||
add_application(matrixAdd8 matrixAdd.c LABELS "sequential_tests" "verilator_tests" FLAGS "-DWORD=8" SUBDIR "matrixAdd8") | ||
add_application(matrixAdd16 matrixAdd.c LABELS "sequential_tests" FLAGS "-DWORD=16" SUBDIR "matrixAdd16") | ||
add_application(matrixAdd8 matrixAdd.c LABELS "sequential_tests" FLAGS "-DWORD=8" SUBDIR "matrixAdd8") | ||
endif() |
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@@ -1 +1 @@ | ||
add_application(matrixMul16 matrixMul.c LABELS "sequential_tests" "verilator_tests") | ||
add_application(matrixMul16 matrixMul.c LABELS "sequential_tests") |
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@@ -1 +1 @@ | ||
add_application(matrixMul32 matrixMul.c LABELS "sequential_tests" "verilator_tests") | ||
add_application(matrixMul32 matrixMul.c LABELS "sequential_tests") |
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