Revert "[ARM] Mark LEApcrel instructions as isAsCheapAsAMove"

Revert "[ARM] Mark LEApcrel as not having side effects" This reverts commit r303054 and r303053, as they broke the ARM self-hosting buildbots: http://lab.llvm.org:8011/builders/clang-cmake-thumbv7-a15-full-sh/builds/1550 http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-selfhost-neon/builds/1349 http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-selfhost/builds/1845 Offline investigation on course. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303193 91177308-0d34-0410-b5e6-96231b3b80d8
ranweiler · May 16, 2017 · 15886e1 · 15886e1
1 parent 791f311
commit 15886e1
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Showing 6 changed files with 5 additions and 65 deletions.
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
@@ -2222,14 +2222,14 @@ def ADR : AI1<{0,?,?,0}, (outs GPR:$Rd), (ins adrlabel:$label),
   let Inst{11-0} = label{11-0};
 }
 
-let hasSideEffects = 0, isReMaterializable = 1, isAsCheapAsAMove = 1 in
+let hasSideEffects = 1 in {
 def LEApcrel : ARMPseudoInst<(outs GPR:$Rd), (ins i32imm:$label, pred:$p),
                     4, IIC_iALUi, []>, Sched<[WriteALU, ReadALU]>;
 
-let hasSideEffects = 1 in
 def LEApcrelJT : ARMPseudoInst<(outs GPR:$Rd),
                       (ins i32imm:$label, pred:$p),
                       4, IIC_iALUi, []>, Sched<[WriteALU, ReadALU]>;
+}
 
 //===----------------------------------------------------------------------===//
 //  Control Flow Instructions.

diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
@@ -1402,7 +1402,7 @@ def tADR : T1I<(outs tGPR:$Rd), (ins t_adrlabel:$addr, pred:$p),
   let DecoderMethod = "DecodeThumbAddSpecialReg";
 }
 
-let hasSideEffects = 0, isReMaterializable = 1, isAsCheapAsAMove = 1 in
+let hasSideEffects = 0, isReMaterializable = 1 in
 def tLEApcrel   : tPseudoInst<(outs tGPR:$Rd), (ins i32imm:$label, pred:$p),
                               2, IIC_iALUi, []>, Sched<[WriteALU]>;
 

diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
@@ -1227,7 +1227,7 @@ def t2ADR : T2PCOneRegImm<(outs rGPR:$Rd),
   let DecoderMethod = "DecodeT2Adr";
 }
 
-let hasSideEffects = 0, isReMaterializable = 1, isAsCheapAsAMove = 1 in
+let hasSideEffects = 0, isReMaterializable = 1 in
 def t2LEApcrel   : t2PseudoInst<(outs rGPR:$Rd), (ins i32imm:$label, pred:$p),
                                 4, IIC_iALUi, []>, Sched<[WriteALU, ReadALU]>;
 let hasSideEffects = 1 in

diff --git a/test/CodeGen/ARM/adr-hoist.ll b/test/CodeGen/ARM/adr-hoist.ll
diff --git a/test/CodeGen/ARM/adr-remat.ll b/test/CodeGen/ARM/adr-remat.ll
diff --git a/test/CodeGen/ARM/align-sp-adjustment.ll b/test/CodeGen/ARM/align-sp-adjustment.ll
@@ -1,10 +1,6 @@
 ; RUN: llc -mtriple=thumbv7 -o - %s | FileCheck %s
 
-; p5 will have been pushed to the stack. Check that it's correctly aligned by
-; looking at the offset of the instruction that loads it. Note that this is
-; very fragile and this test may need to be updated if we happen to spill more
-; or less to the stack.
-; CHECK: ldr{{(.w)?}} r{{[0-9]+}}, [sp, #2104]
+; CHECK: [sp, #2120]
 
 %struct.struct_2 = type { [172 x %struct.struct_1] }
 %struct.struct_1 = type { i32, i32, i32 }