gem: zynqmp: Work with PHY on ep108

There is not a problem to work with phy on RTL5.6 that's why remove this code which fixed problems on previous RTLs. Signed-off-by: Michal Simek <[email protected]>
rck2015 · Jul 31, 2015 · d1579c5 · d1579c5
1 parent ee7ce72
commit d1579c5
Showing 1 changed file with 0 additions and 8 deletions.
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
@@ -348,9 +348,6 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis)
 		priv->init++;
 	}
 
-#ifdef CONFIG_ARM64
-	if (!priv->init) {
-#endif
 	phy_detection(dev);
 
 	/* interface - look at tsec */
@@ -384,16 +381,11 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis)
 		clk_rate = ZYNQ_GEM_FREQUENCY_10;
 		break;
 	}
-#ifdef CONFIG_ARM64
-	}
-#endif
 
-#ifndef CONFIG_ARM64
 	/* Change the rclk and clk only not using EMIO interface */
 	if (!priv->emio)
 		zynq_slcr_gem_clk_setup(dev->iobase !=
 					ZYNQ_GEM_BASEADDR0, clk_rate);
-#endif
 
 	/* set hardware address because of ... */
 	if (!is_valid_ether_addr(dev->enetaddr)) {