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Merge branch 'spear/dt' into next/dt2
* spear/dt: ARM: SPEAr600: Add device-tree support to SPEAr600 boards (update to v3.3-rc7) Conflicts: arch/arm/mach-spear6xx/spear6xx.c arch/arm/mach-vexpress/Kconfig The conflicts are between the previous contents of the next/dt2 branch and upstream changes from v3.3-rc7. Signed-off-by: Arnd Bergmann <[email protected]>
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,8 @@ | ||
| ST SPEAr Platforms Device Tree Bindings | ||
| --------------------------------------- | ||
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| Boards with the ST SPEAr600 SoC shall have the following properties: | ||
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| Required root node property: | ||
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| compatible = "st,spear600"; |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -962,7 +962,7 @@ F: drivers/tty/serial/msm_serial.c | |
| F: drivers/platform/msm/ | ||
| F: drivers/*/pm8???-* | ||
| F: include/linux/mfd/pm8xxx/ | ||
| T: git git://codeaurora.org/quic/kernel/davidb/linux-msm.git | ||
| T: git git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm.git | ||
| S: Maintained | ||
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| ARM/TOSA MACHINE SUPPORT | ||
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@@ -1310,15 +1310,15 @@ F: drivers/atm/ | |
| F: include/linux/atm* | ||
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| ATMEL AT91 MCI DRIVER | ||
| M: Nicolas Ferre <nicolas.ferre@atmel.com> | ||
| M: Ludovic Desroches <ludovic.desroches@atmel.com> | ||
| L: [email protected] (moderated for non-subscribers) | ||
| W: http://www.atmel.com/products/AT91/ | ||
| W: http://www.at91.com/ | ||
| S: Maintained | ||
| F: drivers/mmc/host/at91_mci.c | ||
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| ATMEL AT91 / AT32 MCI DRIVER | ||
| M: Nicolas Ferre <nicolas.ferre@atmel.com> | ||
| M: Ludovic Desroches <ludovic.desroches@atmel.com> | ||
| S: Maintained | ||
| F: drivers/mmc/host/atmel-mci.c | ||
| F: drivers/mmc/host/atmel-mci-regs.h | ||
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||
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@@ -3,3 +3,4 @@ zImage | |
| xipImage | ||
| bootpImage | ||
| uImage | ||
| *.dtb | ||
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| @@ -0,0 +1,47 @@ | ||
| /* | ||
| * Copyright 2012 Stefan Roese <[email protected]> | ||
| * | ||
| * The code contained herein is licensed under the GNU General Public | ||
| * License. You may obtain a copy of the GNU General Public License | ||
| * Version 2 or later at the following locations: | ||
| * | ||
| * http://www.opensource.org/licenses/gpl-license.html | ||
| * http://www.gnu.org/copyleft/gpl.html | ||
| */ | ||
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| /dts-v1/; | ||
| /include/ "spear600.dtsi" | ||
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| / { | ||
| model = "ST SPEAr600 Evaluation Board"; | ||
| compatible = "st,spear600-evb", "st,spear600"; | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
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| memory { | ||
| device_type = "memory"; | ||
| reg = <0 0x10000000>; | ||
| }; | ||
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| ahb { | ||
| gmac: ethernet@e0800000 { | ||
| phy-mode = "gmii"; | ||
| status = "okay"; | ||
| }; | ||
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| apb { | ||
| serial@d0000000 { | ||
| status = "okay"; | ||
| }; | ||
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| serial@d0080000 { | ||
| status = "okay"; | ||
| }; | ||
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| i2c@d0200000 { | ||
| clock-frequency = <400000>; | ||
| status = "okay"; | ||
| }; | ||
| }; | ||
| }; | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,174 @@ | ||
| /* | ||
| * Copyright 2012 Stefan Roese <[email protected]> | ||
| * | ||
| * The code contained herein is licensed under the GNU General Public | ||
| * License. You may obtain a copy of the GNU General Public License | ||
| * Version 2 or later at the following locations: | ||
| * | ||
| * http://www.opensource.org/licenses/gpl-license.html | ||
| * http://www.gnu.org/copyleft/gpl.html | ||
| */ | ||
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| /include/ "skeleton.dtsi" | ||
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| / { | ||
| compatible = "st,spear600"; | ||
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| cpus { | ||
| cpu@0 { | ||
| compatible = "arm,arm926ejs"; | ||
| }; | ||
| }; | ||
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| memory { | ||
| device_type = "memory"; | ||
| reg = <0 0x40000000>; | ||
| }; | ||
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| ahb { | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
| compatible = "simple-bus"; | ||
| ranges = <0xd0000000 0xd0000000 0x30000000>; | ||
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| vic0: interrupt-controller@f1100000 { | ||
| compatible = "arm,pl190-vic"; | ||
| interrupt-controller; | ||
| reg = <0xf1100000 0x1000>; | ||
| #interrupt-cells = <1>; | ||
| }; | ||
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| vic1: interrupt-controller@f1000000 { | ||
| compatible = "arm,pl190-vic"; | ||
| interrupt-controller; | ||
| reg = <0xf1000000 0x1000>; | ||
| #interrupt-cells = <1>; | ||
| }; | ||
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| gmac: ethernet@e0800000 { | ||
| compatible = "st,spear600-gmac"; | ||
| reg = <0xe0800000 0x8000>; | ||
| interrupt-parent = <&vic1>; | ||
| interrupts = <24 23>; | ||
| interrupt-names = "macirq", "eth_wake_irq"; | ||
| status = "disabled"; | ||
| }; | ||
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| fsmc: flash@d1800000 { | ||
| compatible = "st,spear600-fsmc-nand"; | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
| reg = <0xd1800000 0x1000 /* FSMC Register */ | ||
| 0xd2000000 0x4000>; /* NAND Base */ | ||
| reg-names = "fsmc_regs", "nand_data"; | ||
| st,ale-off = <0x20000>; | ||
| st,cle-off = <0x10000>; | ||
| status = "disabled"; | ||
| }; | ||
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| smi: flash@fc000000 { | ||
| compatible = "st,spear600-smi"; | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
| reg = <0xfc000000 0x1000>; | ||
| interrupt-parent = <&vic1>; | ||
| interrupts = <12>; | ||
| status = "disabled"; | ||
| }; | ||
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| ehci@e1800000 { | ||
| compatible = "st,spear600-ehci", "usb-ehci"; | ||
| reg = <0xe1800000 0x1000>; | ||
| interrupt-parent = <&vic1>; | ||
| interrupts = <27>; | ||
| status = "disabled"; | ||
| }; | ||
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| ehci@e2000000 { | ||
| compatible = "st,spear600-ehci", "usb-ehci"; | ||
| reg = <0xe2000000 0x1000>; | ||
| interrupt-parent = <&vic1>; | ||
| interrupts = <29>; | ||
| status = "disabled"; | ||
| }; | ||
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| ohci@e1900000 { | ||
| compatible = "st,spear600-ohci", "usb-ohci"; | ||
| reg = <0xe1900000 0x1000>; | ||
| interrupt-parent = <&vic1>; | ||
| interrupts = <26>; | ||
| status = "disabled"; | ||
| }; | ||
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| ohci@e2100000 { | ||
| compatible = "st,spear600-ohci", "usb-ohci"; | ||
| reg = <0xe2100000 0x1000>; | ||
| interrupt-parent = <&vic1>; | ||
| interrupts = <28>; | ||
| status = "disabled"; | ||
| }; | ||
|
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| apb { | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
| compatible = "simple-bus"; | ||
| ranges = <0xd0000000 0xd0000000 0x30000000>; | ||
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| serial@d0000000 { | ||
| compatible = "arm,pl011", "arm,primecell"; | ||
| reg = <0xd0000000 0x1000>; | ||
| interrupt-parent = <&vic0>; | ||
| interrupts = <24>; | ||
| status = "disabled"; | ||
| }; | ||
|
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| serial@d0080000 { | ||
| compatible = "arm,pl011", "arm,primecell"; | ||
| reg = <0xd0080000 0x1000>; | ||
| interrupt-parent = <&vic0>; | ||
| interrupts = <25>; | ||
| status = "disabled"; | ||
| }; | ||
|
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| /* local/cpu GPIO */ | ||
| gpio0: gpio@f0100000 { | ||
| #gpio-cells = <2>; | ||
| compatible = "arm,pl061", "arm,primecell"; | ||
| gpio-controller; | ||
| reg = <0xf0100000 0x1000>; | ||
| interrupt-parent = <&vic0>; | ||
| interrupts = <18>; | ||
| }; | ||
|
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| /* basic GPIO */ | ||
| gpio1: gpio@fc980000 { | ||
| #gpio-cells = <2>; | ||
| compatible = "arm,pl061", "arm,primecell"; | ||
| gpio-controller; | ||
| reg = <0xfc980000 0x1000>; | ||
| interrupt-parent = <&vic1>; | ||
| interrupts = <19>; | ||
| }; | ||
|
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| /* appl GPIO */ | ||
| gpio2: gpio@d8100000 { | ||
| #gpio-cells = <2>; | ||
| compatible = "arm,pl061", "arm,primecell"; | ||
| gpio-controller; | ||
| reg = <0xd8100000 0x1000>; | ||
| interrupt-parent = <&vic1>; | ||
| interrupts = <4>; | ||
| }; | ||
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| i2c@d0200000 { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| compatible = "snps,designware-i2c"; | ||
| reg = <0xd0200000 0x1000>; | ||
| interrupt-parent = <&vic0>; | ||
| interrupts = <28>; | ||
| status = "disabled"; | ||
| }; | ||
| }; | ||
| }; | ||
| }; |
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