ASoC: Ensure WM8731 register cache is synced when resuming from disabled

Signed-off-by: Mark Brown <[email protected]> Cc: [email protected]
redpig · Nov 21, 2011 · ed3e80c · ed3e80c
1 parent 1d9a91d
commit ed3e80c
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
@@ -453,6 +453,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
 		snd_soc_write(codec, WM8731_PWR, 0xffff);
 		regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
 				       wm8731->supplies);
+		codec->cache_sync = 1;
 		break;
 	}
 	codec->dapm.bias_level = level;