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Merge pull request riscv#110 from incoresemi/support-for-go
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Support for Go language code generation
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aswaterman authored May 3, 2022
2 parents 6176fb4 + 4aba5dd commit 833ba82
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2 changes: 1 addition & 1 deletion .github/workflows/python-app.yml
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,6 @@ jobs:
- name: Install PyYAML
run: pip3 install -r requirements.txt
- name: Generation C code
run: ./parse.py -c -chisel -sverilog -rust -latex "rv*" "unratified/rv*"
run: ./parse.py -c -chisel -sverilog -rust -latex -spinalhdl -go "rv*" "unratified/rv*"
- name: Check C output
run: cat encoding.out.h | cpp
5 changes: 4 additions & 1 deletion README.md
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Expand Up @@ -125,6 +125,7 @@ The following artifacts can be generated using parse.py:
- inst.sverilog : system verilog code to decode instructions
- inst.rs : rust code containing mask and match variables for all instructions
- inst.spinalhdl : spinalhdl code to decode instructions
- inst.go : go code to decode instructions

Make sure you install the required python pre-requisites are installed by executing the following
command:
Expand All @@ -137,12 +138,14 @@ pip3 install -r requirements.txt
To generate all the above artifacts for all instructions currently checked in, simply run `make` from the root-directory. This should print the following log on the command-line:

```
Running with args : ['./parse.py', '-c', '-chisel', '-sverilog', '-rust', '-latex', 'rv*', 'unratified/rv*']
Running with args : ['./parse.py', '-c', '-go', '-chisel', '-sverilog', '-rust', '-latex', '-spinalhdl', 'rv*', 'unratified/rv*']
Extensions selected : ['rv*', 'unratified/rv*']
INFO:: encoding.out.h generated successfully
INFO:: inst.chisel generated successfully
INFO:: inst.spinalhdl generated successfully
INFO:: inst.sverilog generated successfully
INFO:: inst.rs generated successfully
INFO:: inst.go generated successfully
INFO:: instr-table.tex generated successfully
INFO:: priv-instr-table.tex generated successfully
```
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52 changes: 51 additions & 1 deletion parse.py
Original file line number Diff line number Diff line change
Expand Up @@ -839,11 +839,57 @@ def make_c(instr_dict):
''')
enc_file.close()

def make_go(instr_dict):
prelude = '''// Code generated by parse_opcodes -go; DO NOT EDIT.
package riscv
import "cmd/internal/obj"
type inst struct {
opcode uint32
funct3 uint32
rs2 uint32
csr int64
funct7 uint32
}
func encode(a obj.As) *inst {
switch a {
'''
endoffile = ''' }
return nil
}
'''
instr_str = ''
for i in instr_dict:
enc_match = int(instr_dict[i]['match'],0)
opcode = (enc_match >> 0) & ((1<<7)-1)
funct3 = (enc_match >> 12) & ((1<<3)-1)
rs2 = (enc_match >> 20) & ((1<<5)-1)
csr = (enc_match >> 20) & ((1<<12)-1)
funct7 = (enc_match >> 25) & ((1<<7)-1)
instr_str += f''' case A{i.upper().replace("_","")}:
return &inst{{ {hex(opcode)}, {hex(funct3)}, {hex(rs2)}, {signed(csr,12)}, {hex(funct7)} }}
'''

with open('inst.go','w') as file:
file.write(prelude)
file.write(instr_str)
file.write(endoffile)

def signed(value, width):
if 0 <= value < (1<<(width-1)):
return value
else:
return value - (1<<width)


if __name__ == "__main__":
print(f'Running with args : {sys.argv}')

extensions = sys.argv[1:]
for i in ['-c','-latex','-chisel','-sverilog','-rust']:
for i in ['-c','-latex','-chisel','-sverilog','-rust', '-go', '-spinalhdl']:
if i in extensions:
extensions.remove(i)
print(f'Extensions selected : {extensions}')
Expand Down Expand Up @@ -872,6 +918,10 @@ def make_c(instr_dict):
make_rust(instr_dict)
logging.info('inst.rs generated successfully')

if '-go' in sys.argv[1:]:
make_go(instr_dict)
logging.info('inst.go generated successfully')

if '-latex' in sys.argv[1:]:
make_latex_table()
logging.info('instr-table.tex generated successfully')
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