Skip to content

Commit

Permalink
Update longlong.h from GCC
Browse files Browse the repository at this point in the history
  • Loading branch information
@drepper
Andreas Schwab authored and drepper committed May 23, 2011
1 parent f50ef8f commit def7fbd
Show file tree
Hide file tree
Showing 2 changed files with 154 additions and 5 deletions.
4 changes: 4 additions & 0 deletions ChangeLog
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,7 @@
2011-05-20 Andreas Schwab <[email protected]>

* stdlib/longlong.h: Update from GCC.

2011-05-23 Andreas Schwab <[email protected]>

* sysdeps/unix/sysv/linux/ia64/sysconf.c (HAS_CPUCLOCK): Add
Expand Down
155 changes: 150 additions & 5 deletions stdlib/longlong.h
View file
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
2002, 2003, 2004, 2005, 2006, 2009 Free Software Foundation, Inc.
2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
Free Software Foundation, Inc.
This file is part of the GNU C Library.
Expand All @@ -9,15 +10,24 @@
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
In addition to the permissions in the GNU Lesser General Public
License, the Free Software Foundation gives you unlimited
permission to link the compiled version of this file into
combinations with other programs, and to distribute those
combinations without any restriction coming from the use of this
file. (The Lesser General Public License restrictions do apply in
other respects; for example, they cover modification of the file,
and distribution when not linked into a combine executable.)
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, write to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
02111-1307 USA. */
Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
MA 02110-1301, USA. */

/* You have to define the following before including this file:
Expand Down Expand Up @@ -45,6 +55,11 @@
#define UDWtype UDItype
#endif

/* Used in glibc only. */
#ifndef attribute_hidden
#define attribute_hidden
#endif

extern const UQItype __clz_tab[256] attribute_hidden;

/* Define auxiliary asm macros.
Expand Down Expand Up @@ -303,6 +318,7 @@ UDItype __umulsidi3 (USItype, USItype);
#endif

#if (defined (__i370__) || defined (__s390__) || defined (__mvs__)) && W_TYPE_SIZE == 32
#if !defined (__zarch__)
#define smul_ppmm(xh, xl, m0, m1) \
do { \
union {DItype __ll; \
Expand All @@ -324,6 +340,28 @@ UDItype __umulsidi3 (USItype, USItype);
: "0" (__x.__ll), "r" (d)); \
(q) = __x.__i.__l; (r) = __x.__i.__h; \
} while (0)
#else
#define smul_ppmm(xh, xl, m0, m1) \
do { \
register SItype r0 __asm__ ("0"); \
register SItype r1 __asm__ ("1") = m0; \
\
__asm__ ("mr\t%%r0,%3" \
: "=r" (r0), "=r" (r1) \
: "r" (r1), "r" (m1)); \
(xh) = r1; (xl) = r0; \
} while (0)
#define sdiv_qrnnd(q, r, n1, n0, d) \
do { \
register SItype r0 __asm__ ("0") = n0; \
register SItype r1 __asm__ ("1") = n1; \
\
__asm__ ("dr\t%%r0,%3" \
: "=r" (r0), "=r" (r1) \
: "r" (r0), "r" (r1), "r" (d)); \
(q) = r0; (r) = r1; \
} while (0)
#endif /* __zarch__ */
#endif

#if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
Expand Down Expand Up @@ -417,6 +455,55 @@ UDItype __umulsidi3 (USItype, USItype);
__w; })
#endif /* __i960__ */

#if defined (__ia64) && W_TYPE_SIZE == 64
/* This form encourages gcc (pre-release 3.4 at least) to emit predicated
"sub r=r,r" and "sub r=r,r,1", giving a 2 cycle latency. The generic
code using "al<bl" arithmetically comes out making an actual 0 or 1 in a
register, which takes an extra cycle. */
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
do { \
UWtype __x; \
__x = (al) - (bl); \
if ((al) < (bl)) \
(sh) = (ah) - (bh) - 1; \
else \
(sh) = (ah) - (bh); \
(sl) = __x; \
} while (0)

/* Do both product parts in assembly, since that gives better code with
all gcc versions. Some callers will just use the upper part, and in
that situation we waste an instruction, but not any cycles. */
#define umul_ppmm(ph, pl, m0, m1) \
__asm__ ("xma.hu %0 = %2, %3, f0\n\txma.l %1 = %2, %3, f0" \
: "=&f" (ph), "=f" (pl) \
: "f" (m0), "f" (m1))
#define count_leading_zeros(count, x) \
do { \
UWtype _x = (x), _y, _a, _c; \
__asm__ ("mux1 %0 = %1, @rev" : "=r" (_y) : "r" (_x)); \
__asm__ ("czx1.l %0 = %1" : "=r" (_a) : "r" (-_y | _y)); \
_c = (_a - 1) << 3; \
_x >>= _c; \
if (_x >= 1 << 4) \
_x >>= 4, _c += 4; \
if (_x >= 1 << 2) \
_x >>= 2, _c += 2; \
_c += _x >> 1; \
(count) = W_TYPE_SIZE - 1 - _c; \
} while (0)
/* similar to what gcc does for __builtin_ffs, but 0 based rather than 1
based, and we don't need a special case for x==0 here */
#define count_trailing_zeros(count, x) \
do { \
UWtype __ctz_x = (x); \
__asm__ ("popcnt %0 = %1" \
: "=r" (count) \
: "r" ((__ctz_x-1) & ~__ctz_x)); \
} while (0)
#define UMUL_TIME 14
#endif

#if defined (__M32R__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
/* The cmp clears the condition bit. */ \
Expand Down Expand Up @@ -631,6 +718,43 @@ UDItype __umulsidi3 (USItype, USItype);
#endif /* __mc88110__ */
#endif /* __m88000__ */

#if defined (__mn10300__)
# if defined (__AM33__)
# define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X))
# define umul_ppmm(w1, w0, u, v) \
asm("mulu %3,%2,%1,%0" : "=r"(w0), "=r"(w1) : "r"(u), "r"(v))
# define smul_ppmm(w1, w0, u, v) \
asm("mul %3,%2,%1,%0" : "=r"(w0), "=r"(w1) : "r"(u), "r"(v))
# else
# define umul_ppmm(w1, w0, u, v) \
asm("nop; nop; mulu %3,%0" : "=d"(w0), "=z"(w1) : "%0"(u), "d"(v))
# define smul_ppmm(w1, w0, u, v) \
asm("nop; nop; mul %3,%0" : "=d"(w0), "=z"(w1) : "%0"(u), "d"(v))
# endif
# define add_ssaaaa(sh, sl, ah, al, bh, bl) \
do { \
DWunion __s, __a, __b; \
__a.s.low = (al); __a.s.high = (ah); \
__b.s.low = (bl); __b.s.high = (bh); \
__s.ll = __a.ll + __b.ll; \
(sl) = __s.s.low; (sh) = __s.s.high; \
} while (0)
# define sub_ddmmss(sh, sl, ah, al, bh, bl) \
do { \
DWunion __s, __a, __b; \
__a.s.low = (al); __a.s.high = (ah); \
__b.s.low = (bl); __b.s.high = (bh); \
__s.ll = __a.ll - __b.ll; \
(sl) = __s.s.low; (sh) = __s.s.high; \
} while (0)
# define udiv_qrnnd(q, r, nh, nl, d) \
asm("divu %2,%0" : "=D"(q), "=z"(r) : "D"(d), "0"(nl), "1"(nh))
# define sdiv_qrnnd(q, r, nh, nl, d) \
asm("div %2,%0" : "=D"(q), "=z"(r) : "D"(d), "0"(nl), "1"(nh))
# define UMUL_TIME 3
# define UDIV_TIME 38
#endif

#if defined (__mips__) && W_TYPE_SIZE == 32
#define umul_ppmm(w1, w0, u, v) \
do { \
Expand Down Expand Up @@ -926,8 +1050,7 @@ UDItype __umulsidi3 (USItype, USItype);
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("clrt;subc %5,%1; subc %4,%0" \
: "=r" (sh), "=r" (sl) \
: "0" (ah), "1" (al), "r" (bh), "r" (bl) \
: "t")
: "0" (ah), "1" (al), "r" (bh), "r" (bl) : "t")

#endif /* __sh__ */

Expand Down Expand Up @@ -1261,6 +1384,28 @@ UDItype __umulsidi3 (USItype, USItype);
#define count_trailing_zeros(COUNT, X) ((COUNT) = __builtin_ctz (X))
#endif /* __xtensa__ */

#if defined xstormy16
extern UHItype __stormy16_count_leading_zeros (UHItype);
#define count_leading_zeros(count, x) \
do \
{ \
UHItype size; \
\
/* We assume that W_TYPE_SIZE is a multiple of 16... */ \
for ((count) = 0, size = W_TYPE_SIZE; size; size -= 16) \
{ \
UHItype c; \
\
c = __clzhi2 ((x) >> (size - 16)); \
(count) += c; \
if (c != 16) \
break; \
} \
} \
while (0)
#define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
#endif

#if defined (__z8000__) && W_TYPE_SIZE == 16
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add %H1,%H5\n\tadc %H0,%H3" \
Expand Down

0 comments on commit def7fbd

Please sign in to comment.