src/cpu: intel_cpus: Re-arrange the order of cpu model numbers

PowerTop support for different platforms are added and they are not in the order they should be. Hence, re-arrange based on the CPUIDs of the platform. Signed-off-by: Gayatri Kammela <[email protected]>
rostedt · Apr 1, 2020 · d066844 · d066844
1 parent bc9a463
commit d066844
Showing 1 changed file with 16 additions and 16 deletions.
diff --git a/src/cpu/intel_cpus.cpp b/src/cpu/intel_cpus.cpp
@@ -45,29 +45,29 @@ static int intel_cpu_models[] = {
 	0x1A,	/* Core i7, Xeon 5500 series */
 	0x1E,	/* Core i7 and i5 Processor - Lynnfield Jasper Forest */
 	0x1F,	/* Core i7 and i5 Processor - Nehalem */
-	0x2E,	/* Nehalem-EX Xeon */
-	0x2F,	/* Westmere-EX Xeon */
 	0x25,	/* Westmere */
-	0x27,	/* Medfield Atom*/
-	0x2C,	/* Westmere */
+	0x27,	/* Medfield Atom */
 	0x2A,	/* SNB */
+	0x2C,	/* Westmere */
 	0x2D,	/* SNB Xeon */
+	0x2E,	/* Nehalem-EX Xeon */
+	0x2F,	/* Westmere-EX Xeon */
 	0x37,	/* BYT-M */
 	0x3A,	/* IVB */
-	0x3C,
+	0x3C,	/* HSW */
 	0x3D,	/* BDW */
 	0x3E,	/* IVB Xeon */
 	0x3F,	/* HSX */
 	0x45,	/* HSW-ULT */
-	0x46,	/* HSW */
+	0x46,	/* HSW-G */
 	0x47,	/* BDW-H */
 	0x4C,	/* BSW */
 	0x4D,	/* AVN */
 	0x4F,	/* BDX */
 	0x4E,	/* SKY */
-	0x5E,	/* SKY */
 	0x56,	/* BDX-DE */
-	0x5c,   /* BXT-P */
+	0x5C,	/* BXT-P */
+	0x5E,	/* SKY */
 	0x66,   /* CNL-U/Y */
 	0x6A,	/* ICL_X*/
 	0x7A,   /* GLK */
@@ -171,13 +171,13 @@ nhm_core::nhm_core(int model)
 		case 0x2A:	/* SNB */
 		case 0x2D:	/* SNB Xeon */
 		case 0x3A:      /* IVB */
-		case 0x3C:
+		case 0x3C:	/* HSW */
+		case 0x3D:	/* BDW */
 		case 0x3E:      /* IVB Xeon */
 		case 0x45:	/* HSW-ULT */
 		case 0x4E:	/* SKY */
 		case 0x5E:	/* SKY */
-		case 0x3D:	/* BDW */
-		case 0x5c:      /* BXT-P */
+		case 0x5C:      /* BXT-P */
 		case 0x66:	/* CNL-U/Y */
 		case 0x6A:    	/* ICL_X*/
 		case 0x7A:	/* GLK */
@@ -362,13 +362,13 @@ nhm_package::nhm_package(int model)
 		case 0x2A:	/* SNB */
 		case 0x2D:	/* SNB Xeon */
 		case 0x3A:      /* IVB */
-		case 0x3C:
+		case 0x3C:	/* HSW */
+		case 0x3D:	/* BDW */
 		case 0x3E:      /* IVB Xeon */
 		case 0x45:	/* HSW-ULT */
 		case 0x4E:	/* SKY */
+		case 0x5C:	/* BXT-P */
 		case 0x5E:	/* SKY */
-		case 0x3D:	/* BDW */
-		case 0x5c:      /* BXT-P */
 		case 0x66:	/* CNL-U/Y */
 		case 0x6A:  	/* ICL_X*/
 		case 0x7A:	/* GLK */
@@ -407,11 +407,11 @@ nhm_package::nhm_package(int model)
 
 	/*Has C8/9/10*/
 	switch(model) {
-		case 0x45:	/* HSW */
 		case 0x3D:	/* BDW */
+		case 0x45:	/* HSW */
 		case 0x4E:	/* SKY */
+		case 0x5C:	/* BXT-P */
 		case 0x5E:	/* SKY */
-		case 0x5c:	/* BXT-P */ 
 		case 0x66:	/* CNL-U/Y */
 		case 0x6A:	/* ICL_X*/
 		case 0x7A:	/* GLK */