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Cache flush/invalidate needs RWX permission
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When generating JIT code, perform cache maintenance operations before
removing page write permissions. Errata on some cores require data
flush operations to be followed by data invalidate operations
requiring write permission.

Test: ART_TEST_JIT=true test-art-target on an arm64 device.
bug: 27265969

(cherry picked from commit b18a669259aa6ba08d9ca01b5b32c1aa0417138b)

Change-Id: I53080c664f9e7cfebe25f87cf6a45cd6eb33b281
Artem Udovichenko authored and Nicolas Geoffray committed Jan 23, 2017
1 parent 61049e8 commit 3f3d4d6
Showing 1 changed file with 8 additions and 2 deletions.
10 changes: 8 additions & 2 deletions runtime/jit/jit_code_cache.cc
Original file line number Diff line number Diff line change
@@ -342,10 +342,16 @@ uint8_t* JitCodeCache::CommitCodeInternal(Thread* self,
core_spill_mask,
fp_spill_mask,
code_size);
// Flush caches before we remove write permission because on some ARMv8 hardware,
// flushing caches require write permissions.
//
// For reference, here are kernel patches discussing about this issue:
// https://android.googlesource.com/kernel/msm/%2B/0e7f7bcc3fc87489cda5aa6aff8ce40eed912279
// https://patchwork.kernel.org/patch/9047921/
FlushInstructionCache(reinterpret_cast<char*>(code_ptr),
reinterpret_cast<char*>(code_ptr + code_size));
}

FlushInstructionCache(reinterpret_cast<char*>(code_ptr),
reinterpret_cast<char*>(code_ptr + code_size));
number_of_compilations_++;
}
// We need to update the entry point in the runnable state for the instrumentation.

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