Introduce riscv64 ioctls
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TimePrinciple
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riscv64 ioctlsriscv64 ioctls
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riscv64 ioctlsriscv64 ioctls
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How strange, I have no clue why |
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rbradford
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Oct 7, 2024
roypat
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Oct 14, 2024
Limit `get_reg_list` doc example to run on ARM64 only, since `get_reg_list` is for ARM64 and RISC-V64 but 500 registers are too big for RISC-V (a value between 180~200). Signed-off-by: Ruoqing He <[email protected]>
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Originally `set_device_attr` uses VFIO device for testing, but that's not available yet on RISC-V 64-bit platform, the QEMU patch [1] and kernel patch [2] are not upstreamed. Disabling VFIO device test for RISC-V at the time being. [1] https://lore.kernel.org/all/[email protected]/ [2] https://github.com/ventanamicro/linux/tree/dev-upstream Signed-off-by: Ruoqing He <[email protected]>
Complete `create_device` doc test to create the creation of AIA device on RISC-V 64-bit platform. Signed-off-by: Ruoqing He <[email protected]>
RISC-V 64-bit requires an in-kernel interrupt chip (AIA) to be created in advance of committing `gsi_routing_table`. Signed-off-by: Ruoqing He <[email protected]>
Add assembly code which does dirty one page and forces MMIO exit on RISC-V 64-bit platform to complete `get_dirty_log` doc test. Signed-off-by: Ruoqing He <[email protected]>
Add example which triggers an MMIO exit after creating a dirty page. Signed-off-by: Ruoqing He <[email protected]>
Add: - `test_run_code` - `mpstate_test` - `test_faulty_vcpu_fd` - `test_faulty_vcpu_fd_riscv64` - `test_get_reg_list` - `test_set_one_reg` - `test_get_one_reg` tests. Signed-off-by: Ruoqing He <[email protected]>
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@rbradford @roypat please take another look :) |
Add `test_create_device` to verify that vAIA device works on riscv64. Signed-off-by: Ruoqing He <[email protected]>
Add: - `test_register_unregister_irqfd` - `test_set_irq_line` - `test_singal_msi_failure` - `test_set_gsi_routing` tests. Signed-off-by: Ruoqing He <[email protected]>
Compilation would fail with previous code on other architectures don't have `create_irq_chip` available. Repurpose this unit test to work on all architectures. Signed-off-by: Ruoqing He <[email protected]>
Add `.platform` to enable CI on riscv64 platform. Signed-off-by: Ruoqing He <[email protected]>
Update `CHANGELOG.md` to document added riscv64 ioctls. Signed-off-by: Ruoqing He <[email protected]>
Update `README.md` since riscv64 is introduced as experimental. Signed-off-by: Ruoqing He <[email protected]>
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rbradford
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Oct 16, 2024
roypat
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Oct 17, 2024
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Summary of the PR
Add basic support for
riscv64architecture.Requirements
Before submitting your PR, please make sure you addressed the following
requirements:
git commit -s), and the commit message has max 60 characters for thesummary and max 75 characters for each description line.
test.
Release" section of CHANGELOG.md (if no such section exists, please create one).
unsafecode is properly documented.