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lib: Add CRC32C Implementation
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This implementation was derived from FreeBSD:
http://svnweb.freebsd.org/base/head/sys/libkern/crc32.c

Reviewed-by: Simon Horman <[email protected]>
Signed-off-by: Joe Stringer <[email protected]>
Signed-off-by: Ben Pfaff <[email protected]>
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@joestringer @blp
joestringer authored and blp committed Aug 22, 2013
1 parent 978427a commit 97025b2
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Showing 7 changed files with 241 additions and 1 deletion.
4 changes: 4 additions & 0 deletions debian/copyright.in
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Expand Up @@ -101,6 +101,10 @@ License:
The full text of each license is also appended to the end of this
file.

* The following components are licensed for use as desired without restriction:

lib/crc32c.c

* The following components are licensed under the
Python Software Foundation License Version 2.

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2 changes: 2 additions & 0 deletions lib/automake.mk
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Expand Up @@ -33,6 +33,8 @@ lib_libopenvswitch_a_SOURCES = \
lib/compiler.h \
lib/coverage.c \
lib/coverage.h \
lib/crc32c.c \
lib/crc32c.h \
lib/csum.c \
lib/csum.h \
lib/daemon.c \
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10 changes: 10 additions & 0 deletions lib/byte-order.h
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Expand Up @@ -40,6 +40,16 @@ ovs_be64 htonll(uint64_t);
uint64_t ntohll(ovs_be64);
#endif

#if defined(WORDS_BIGENDIAN)
static inline uint32_t
uint32_byteswap(uint32_t crc) {
return (((crc & 0x000000ff) << 24) |
((crc & 0x0000ff00) << 8) |
((crc & 0x00ff0000) >> 8) |
((crc & 0xff000000) >> 24));
}
#endif

/* These macros may substitute for htons(), htonl(), and htonll() in contexts
* where function calls are not allowed, such as case labels. They should not
* be used elsewhere because all of them evaluate their argument many times. */
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159 changes: 159 additions & 0 deletions lib/crc32c.c
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/*-
* COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or
* code or tables extracted from it, as desired without restriction.
*/

/*
* First, the polynomial itself and its table of feedback terms. The
* polynomial is
* X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0
*
* Note that we take it "backwards" and put the highest-order term in
* the lowest-order bit. The X^32 term is "implied"; the LSB is the
* X^31 term, etc. The X^0 term (usually shown as "+1") results in
* the MSB being 1
*
* Note that the usual hardware shift register implementation, which
* is what we're using (we're merely optimizing it by doing eight-bit
* chunks at a time) shifts bits into the lowest-order term. In our
* implementation, that means shifting towards the right. Why do we
* do it this way? Because the calculated CRC must be transmitted in
* order from highest-order term to lowest-order term. UARTs transmit
* characters in order from LSB to MSB. By storing the CRC this way
* we hand it to the UART in the order low-byte to high-byte; the UART
* sends each low-bit to hight-bit; and the result is transmission bit
* by bit from highest- to lowest-order term without requiring any bit
* shuffling on our part. Reception works similarly
*
* The feedback terms table consists of 256, 32-bit entries. Notes
*
* The table can be generated at runtime if desired; code to do so
* can be found in FreeBSD. It might not be obvious, but the feedback
* terms simply represent the results of eight shift/xor opera
* tions for all combinations of data and CRC register values
*
* The values must be right-shifted by eight bits by the "updcrc
* logic; the shift must be unsigned (bring in zeroes). On some
* hardware you could probably optimize the shift in assembler by
* using byte-swap instructions
* polynomial $edb88320
*
*
* CRC32 code derived from work by Gary S. Brown.
*/

#include <config.h>
#include "crc32c.h"
#include "byte-order.h"

/*****************************************************************/
/* */
/* CRC LOOKUP TABLE */
/* ================ */
/* The following CRC lookup table was generated automagically */
/* by the Rocksoft^tm Model CRC Algorithm Table Generation */
/* Program V1.0 using the following model parameters: */
/* */
/* Width : 4 bytes. */
/* Poly : 0x1EDC6F41L */
/* Reverse : TRUE. */
/* */
/* For more information on the Rocksoft^tm Model CRC Algorithm, */
/* see the document titled "A Painless Guide to CRC Error */
/* Detection Algorithms" by Ross Williams */
/* ([email protected].). This document is likely to be */
/* in the FTP archive "ftp.adelaide.edu.au/pub/rocksoft". */
/* */
/*****************************************************************/
static const uint32_t crc32Table[256] = {
0x00000000L, 0xF26B8303L, 0xE13B70F7L, 0x1350F3F4L,
0xC79A971FL, 0x35F1141CL, 0x26A1E7E8L, 0xD4CA64EBL,
0x8AD958CFL, 0x78B2DBCCL, 0x6BE22838L, 0x9989AB3BL,
0x4D43CFD0L, 0xBF284CD3L, 0xAC78BF27L, 0x5E133C24L,
0x105EC76FL, 0xE235446CL, 0xF165B798L, 0x030E349BL,
0xD7C45070L, 0x25AFD373L, 0x36FF2087L, 0xC494A384L,
0x9A879FA0L, 0x68EC1CA3L, 0x7BBCEF57L, 0x89D76C54L,
0x5D1D08BFL, 0xAF768BBCL, 0xBC267848L, 0x4E4DFB4BL,
0x20BD8EDEL, 0xD2D60DDDL, 0xC186FE29L, 0x33ED7D2AL,
0xE72719C1L, 0x154C9AC2L, 0x061C6936L, 0xF477EA35L,
0xAA64D611L, 0x580F5512L, 0x4B5FA6E6L, 0xB93425E5L,
0x6DFE410EL, 0x9F95C20DL, 0x8CC531F9L, 0x7EAEB2FAL,
0x30E349B1L, 0xC288CAB2L, 0xD1D83946L, 0x23B3BA45L,
0xF779DEAEL, 0x05125DADL, 0x1642AE59L, 0xE4292D5AL,
0xBA3A117EL, 0x4851927DL, 0x5B016189L, 0xA96AE28AL,
0x7DA08661L, 0x8FCB0562L, 0x9C9BF696L, 0x6EF07595L,
0x417B1DBCL, 0xB3109EBFL, 0xA0406D4BL, 0x522BEE48L,
0x86E18AA3L, 0x748A09A0L, 0x67DAFA54L, 0x95B17957L,
0xCBA24573L, 0x39C9C670L, 0x2A993584L, 0xD8F2B687L,
0x0C38D26CL, 0xFE53516FL, 0xED03A29BL, 0x1F682198L,
0x5125DAD3L, 0xA34E59D0L, 0xB01EAA24L, 0x42752927L,
0x96BF4DCCL, 0x64D4CECFL, 0x77843D3BL, 0x85EFBE38L,
0xDBFC821CL, 0x2997011FL, 0x3AC7F2EBL, 0xC8AC71E8L,
0x1C661503L, 0xEE0D9600L, 0xFD5D65F4L, 0x0F36E6F7L,
0x61C69362L, 0x93AD1061L, 0x80FDE395L, 0x72966096L,
0xA65C047DL, 0x5437877EL, 0x4767748AL, 0xB50CF789L,
0xEB1FCBADL, 0x197448AEL, 0x0A24BB5AL, 0xF84F3859L,
0x2C855CB2L, 0xDEEEDFB1L, 0xCDBE2C45L, 0x3FD5AF46L,
0x7198540DL, 0x83F3D70EL, 0x90A324FAL, 0x62C8A7F9L,
0xB602C312L, 0x44694011L, 0x5739B3E5L, 0xA55230E6L,
0xFB410CC2L, 0x092A8FC1L, 0x1A7A7C35L, 0xE811FF36L,
0x3CDB9BDDL, 0xCEB018DEL, 0xDDE0EB2AL, 0x2F8B6829L,
0x82F63B78L, 0x709DB87BL, 0x63CD4B8FL, 0x91A6C88CL,
0x456CAC67L, 0xB7072F64L, 0xA457DC90L, 0x563C5F93L,
0x082F63B7L, 0xFA44E0B4L, 0xE9141340L, 0x1B7F9043L,
0xCFB5F4A8L, 0x3DDE77ABL, 0x2E8E845FL, 0xDCE5075CL,
0x92A8FC17L, 0x60C37F14L, 0x73938CE0L, 0x81F80FE3L,
0x55326B08L, 0xA759E80BL, 0xB4091BFFL, 0x466298FCL,
0x1871A4D8L, 0xEA1A27DBL, 0xF94AD42FL, 0x0B21572CL,
0xDFEB33C7L, 0x2D80B0C4L, 0x3ED04330L, 0xCCBBC033L,
0xA24BB5A6L, 0x502036A5L, 0x4370C551L, 0xB11B4652L,
0x65D122B9L, 0x97BAA1BAL, 0x84EA524EL, 0x7681D14DL,
0x2892ED69L, 0xDAF96E6AL, 0xC9A99D9EL, 0x3BC21E9DL,
0xEF087A76L, 0x1D63F975L, 0x0E330A81L, 0xFC588982L,
0xB21572C9L, 0x407EF1CAL, 0x532E023EL, 0xA145813DL,
0x758FE5D6L, 0x87E466D5L, 0x94B49521L, 0x66DF1622L,
0x38CC2A06L, 0xCAA7A905L, 0xD9F75AF1L, 0x2B9CD9F2L,
0xFF56BD19L, 0x0D3D3E1AL, 0x1E6DCDEEL, 0xEC064EEDL,
0xC38D26C4L, 0x31E6A5C7L, 0x22B65633L, 0xD0DDD530L,
0x0417B1DBL, 0xF67C32D8L, 0xE52CC12CL, 0x1747422FL,
0x49547E0BL, 0xBB3FFD08L, 0xA86F0EFCL, 0x5A048DFFL,
0x8ECEE914L, 0x7CA56A17L, 0x6FF599E3L, 0x9D9E1AE0L,
0xD3D3E1ABL, 0x21B862A8L, 0x32E8915CL, 0xC083125FL,
0x144976B4L, 0xE622F5B7L, 0xF5720643L, 0x07198540L,
0x590AB964L, 0xAB613A67L, 0xB831C993L, 0x4A5A4A90L,
0x9E902E7BL, 0x6CFBAD78L, 0x7FAB5E8CL, 0x8DC0DD8FL,
0xE330A81AL, 0x115B2B19L, 0x020BD8EDL, 0xF0605BEEL,
0x24AA3F05L, 0xD6C1BC06L, 0xC5914FF2L, 0x37FACCF1L,
0x69E9F0D5L, 0x9B8273D6L, 0x88D28022L, 0x7AB90321L,
0xAE7367CAL, 0x5C18E4C9L, 0x4F48173DL, 0xBD23943EL,
0xF36E6F75L, 0x0105EC76L, 0x12551F82L, 0xE03E9C81L,
0x34F4F86AL, 0xC69F7B69L, 0xD5CF889DL, 0x27A40B9EL,
0x79B737BAL, 0x8BDCB4B9L, 0x988C474DL, 0x6AE7C44EL,
0xBE2DA0A5L, 0x4C4623A6L, 0x5F16D052L, 0xAD7D5351L
};

/*
* Compute a CRC32c checksum as per the SCTP requirements in RFC4960. This
* includes beginning with a checksum of all ones, and returning the negated
* CRC. Unlike the RFC, we return the checksum in network byte-order.
*/
ovs_be32
crc32c(const uint8_t *data, size_t size)
{
uint32_t crc = 0xffffffffL;

while (size--) {
crc = crc32Table[(crc ^ *data++) & 0xff] ^ (crc >> 8);
}

/* The result of this CRC calculation provides us a value in the reverse
* byte-order as compared with our architecture. On big-endian systems,
* this is opposite to our return type. So, to return a big-endian
* value, we must swap the byte-order. */
#if defined(WORDS_BIGENDIAN)
crc = uint32_byteswap(crc);
#endif

/* Our value is in network byte-order. OVS_FORCE keeps sparse happy. */
return (OVS_FORCE ovs_be32) ~crc;
}
25 changes: 25 additions & 0 deletions lib/crc32c.h
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/*
* Copyright (c) 2012 The University of Waikato.
* Author: Joe Stringer
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/

#ifndef CRC32C_H
#define CRC32C_H 1

#include "openvswitch/types.h"

ovs_be32 crc32c(const uint8_t *data, size_t);

#endif /* crc32c.h */
2 changes: 1 addition & 1 deletion tests/library.at
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Expand Up @@ -7,7 +7,7 @@ AT_CHECK([test-flows <flows 3<pcap], [0], [checked 247 packets, 0 errors
AT_CLEANUP

AT_SETUP([test TCP/IP checksumming])
AT_CHECK([test-csum], [0], [....#....#....##................................#................................#
AT_CHECK([test-csum], [0], [....#....#....###................................#................................#
])
AT_CLEANUP

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40 changes: 40 additions & 0 deletions tests/test-csum.c
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Expand Up @@ -16,6 +16,7 @@

#include <config.h>
#include "csum.h"
#include "crc32c.h"
#include <inttypes.h>
#include <netinet/in.h>
#include <stdio.h>
Expand Down Expand Up @@ -136,6 +137,44 @@ test_rfc1624(void)
mark('#');
}

/* CRC32C checksum tests, based on Intel IPPs, Chapter 13,
* ippsCRC32C_8u() example, found at the following location:
* http://software.intel.com/sites/products/documentation/hpc/ipp/ipps/ */
static void
test_crc32c(void)
{
int i;
uint8_t data[48] = {
0x01, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,
0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x18,
0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};

/* iSCSI Read PDU */
assert(ntohl(crc32c(data, 48)) == 0x563a96d9L);

/* 32 bytes of all zeroes */
for (i = 0; i < 32; i++) data[i] = 0x00;
assert(ntohl(crc32c(data, 32)) == 0xaa36918aL);

/* 32 bytes of all ones */
for (i = 0; i < 32; i++) data[i] = 0xff;
assert(ntohl(crc32c(data, 32)) == 0x43aba862L);

/* 32 bytes of incrementing 00..1f */
for (i = 0; i < 32; i++) data[i] = i;
assert(ntohl(crc32c(data, 32)) == 0x4e79dd46L);

/* 32 bytes of decrementing 1f..00 */
for (i = 0; i < 32; i++) data[i] = 31 - i;
assert(ntohl(crc32c(data, 32)) == 0x5cdb3f11L);

mark('#');
}

int
main(void)
{
Expand Down Expand Up @@ -198,6 +237,7 @@ main(void)
}

test_rfc1624();
test_crc32c();

/* Test recalc_csum16(). */
for (i = 0; i < 32; i++) {
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