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Merge pull request sstsimulator#1910 from sstsimulator/devel
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Automatically Merged using SST Master Branch Merger
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@sst-autotester
sst-autotester authored May 28, 2022
2 parents 28ae5a7 + df366e1 commit 47f2a11
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Showing 9 changed files with 284 additions and 113 deletions.
58 changes: 33 additions & 25 deletions src/sst/elements/llyr/llyr.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -145,10 +145,7 @@ LlyrComponent::~LlyrComponent()
// for(auto appIterator = app_vertex_map_->begin(); appIterator != app_vertex_map_->end(); ++appIterator) {
// std::cout << appIterator->first << ": ";
// std::cout << appIterator->second.getValue().optype_ << " - ";
// std::cout << appIterator->second.getValue().constant_val_ << " - ";
// std::cout << appIterator->second.getValue().left_arg_ << " - ";
// std::cout << appIterator->second.getValue().right_arg_ << std::endl;
//
// std::cout << appIterator->second.getValue().argument_ << " - ";
// }
}

Expand All @@ -164,7 +161,6 @@ void LlyrComponent::init( uint32_t phase )
output_->verbose(CALL_INFO, 2, 0, "Initializing...\n");

mem_interface_->init( phase );

if( 0 == phase ) {
std::vector< uint64_t >* initVector;

Expand Down Expand Up @@ -277,7 +273,7 @@ void LlyrComponent::handleEvent(StandardMem::Request* req) {
req->handle(mem_handlers_);
}

/* Handler for incoming Read requests */
// Handler for incoming Read requests
void LlyrComponent::LlyrMemHandlers::handle(StandardMem::Read* read) {
out->verbose(CALL_INFO, 8, 0, "Handle Read for Address p-0x%" PRIx64 " -- v-0x%" PRIx64 ".\n", read->pAddr, read->vAddr);

Expand All @@ -286,7 +282,7 @@ void LlyrComponent::LlyrMemHandlers::handle(StandardMem::Read* read) {
llyr_->mem_interface_->send(resp);
}

/* Handler for incoming Write requests */
// Handler for incoming Write requests
void LlyrComponent::LlyrMemHandlers::handle(StandardMem::Write* write) {
out->verbose(CALL_INFO, 8, 0, "Handle Write for Address p-0x%" PRIx64 " -- v-0x%" PRIx64 ".\n", write->pAddr, write->vAddr);

Expand All @@ -299,7 +295,8 @@ void LlyrComponent::LlyrMemHandlers::handle(StandardMem::Write* write) {
delete write;
}

/* Handler for incoming Read responses - should be a response to a Read we issued */
// Handler for incoming Read responses
// - should be a response to a Read we issued
void LlyrComponent::LlyrMemHandlers::handle(StandardMem::ReadResp* resp) {

std::stringstream dataOut;
Expand Down Expand Up @@ -336,7 +333,8 @@ void LlyrComponent::LlyrMemHandlers::handle(StandardMem::ReadResp* resp) {
out->verbose(CALL_INFO, 4, 0, "Complete cache response handling.\n");
}

/* Handler for incoming Write responses - should be a response to a Write we issued */
// Handler for incoming Write responses
// should be a response to a Write we issued
void LlyrComponent::LlyrMemHandlers::handle(StandardMem::WriteResp* resp) {

out->verbose(CALL_INFO, 8, 0, "Response to a write for addr: %" PRIu64 " to PE %" PRIu32 "\n",
Expand Down Expand Up @@ -485,33 +483,43 @@ void LlyrComponent::constructSoftwareGraphApp(std::ifstream& inputStream)

//Ignore blank lines
if( std::all_of(thisLine.begin(), thisLine.end(), isspace) == 0 ) {
//First read all nodes
//If all nodes read, must mean we're at edge list
position = thisLine.find_first_of( "[" );
//First read all nodes, if all nodes read, must mean we're at edge list
position = thisLine.find_first_of( "pe_type" );
if( position != std::string::npos ) {
AppNode tempNode;
uint32_t vertex = std::stoul( thisLine.substr( 0, position ) );

std::uint64_t posA = thisLine.find_first_of( "=" ) + 1;
std::uint64_t posB = thisLine.find_last_of( "," );
if( posB != std::string::npos ) {
std::uint64_t posC = thisLine.find_last_of( "]" );
tempNode.constant_val_ = thisLine.substr( posB + 1, posC - posB - 1 );
// std::cout << "CONSTANT " << tempNode.constant_val_ << std::endl;
} else {
posB = thisLine.find_last_of( "]" );
uint32_t vertex = std::stoul( thisLine.substr( 0, position - 2 ) );

std::regex delimiter( ",| " );
std::sregex_token_iterator iterA(thisLine.begin(), thisLine.end(), delimiter, -1);
std::sregex_token_iterator iterB;
std::vector< std::string > edges( iterA, iterB );

//clean up the strings a bit
for( auto testIter = edges.begin(); testIter != edges.end(); ++testIter ) {
testIter->erase(remove_if(testIter->begin(), testIter->end(), isspace), testIter->end());
testIter->erase(remove(testIter->begin(), testIter->end(), '['), testIter->end());
testIter->erase(remove(testIter->begin(), testIter->end(), ']'), testIter->end());
output_->verbose(CALL_INFO, 10, 0, "Hiho %s\n", testIter->c_str());
}

std::string op = thisLine.substr( posA, posB-posA );
//pe_type= - 8chars
std::string op = edges[1].substr(8);
opType operation = getOptype(op);
tempNode.optype_ = operation;
output_->verbose(CALL_INFO, 10, 0, "OpString: %s\t\t%" PRIu32 "\n", op.c_str(), tempNode.optype_);

//Check to see if this PE has any arguments
for( uint32_t i = 2; i < edges.size(); ++i ) {
tempNode.argument_[i - 2] = edges[i];

std::cout << i << " - " << edges[i] << " ";
std::cout << i - 2 << " : " <<tempNode.argument_[i - 2] << " ";
}
std::cout << std::endl;

applicationGraph_.addVertex( vertex, tempNode );
} else {

std::regex delimiter( "\\--" );

std::sregex_token_iterator iterA(thisLine.begin(), thisLine.end(), delimiter, -1);
std::sregex_token_iterator iterB;
std::vector< std::string > edges( iterA, iterB );
Expand Down
19 changes: 11 additions & 8 deletions src/sst/elements/llyr/llyrTypes.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -57,9 +57,10 @@ typedef enum {
ANY_MEM,
LD,
LDADDR,
LD_ST,
STREAM_LD,
ST,
STADDR,
STREAM_ST,
ANY_LOGIC = 0x20,
AND,
OR,
Expand Down Expand Up @@ -127,12 +128,14 @@ inline opType getOptype(std::string &opString)
operation = LD;
else if( opString == "LDADDR" )
operation = LDADDR;
else if( opString == "LD_ST" )
operation = LD_ST;
else if( opString == "STREAM_LD" )
operation = STREAM_LD;
else if( opString == "ST" )
operation = ST;
else if( opString == "STADDR" )
operation = STADDR;
else if( opString == "STREAM_ST" )
operation = STREAM_ST;
else if( opString == "ANY_LOGIC" )
operation = ANY_LOGIC;
else if( opString == "AND" )
Expand Down Expand Up @@ -241,12 +244,14 @@ inline std::string getOpString(opType &op)
operation = "LD";
else if( op == LDADDR )
operation = "LDADDR";
else if( op == LD_ST )
operation = "LD_ST";
else if( op == STREAM_LD )
operation = "STREAM_LD";
else if( op == ST )
operation = "ST";
else if( op == STADDR )
operation = "STADDR";
else if( op == STREAM_ST )
operation = "STREAM_ST";
else if( op == ANY_LOGIC )
operation = "ANY_LOGIC";
else if( op == AND )
Expand Down Expand Up @@ -344,9 +349,7 @@ inline std::string getOpString(opType &op)
// application graph node
typedef struct alignas(uint64_t) {
opType optype_;
Arg left_arg_;
Arg right_arg_;
Arg constant_val_;
Arg argument_[2];
} AppNode;

}//Llyr
Expand Down
31 changes: 13 additions & 18 deletions src/sst/elements/llyr/mappers/llyrMapper.h
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Original file line number Diff line number Diff line change
Expand Up @@ -42,11 +42,8 @@ class LlyrMapper : public SST::Module

void addNode(opType op_binding, uint32_t nodeNum, LlyrGraph< ProcessingElement* > &graphOut,
LlyrConfig* llyr_config);
void addNode(opType op_binding, int64_t intConst, uint32_t nodeNum, LlyrGraph< ProcessingElement* > &graphOut,
void addNode(opType op_binding, std::string *arguments, uint32_t nodeNum, LlyrGraph< ProcessingElement* > &graphOut,
LlyrConfig* llyr_config);
void addNode(opType op_binding, double dblConst, uint32_t nodeNum, LlyrGraph< ProcessingElement* > &graphOut,
LlyrConfig* llyr_config);

};

void LlyrMapper::addNode(opType op_binding, uint32_t nodeNum, LlyrGraph< ProcessingElement* > &graphOut,
Expand All @@ -61,8 +58,6 @@ void LlyrMapper::addNode(opType op_binding, uint32_t nodeNum, LlyrGraph< Process

if( op_binding == LD ) {
tempPE = new LoadProcessingElement( LD, nodeNum, llyr_config );
} else if( op_binding == LD_ST ) {
tempPE = new LoadProcessingElement( LD_ST, nodeNum, llyr_config );
} else if( op_binding == ST ) {
tempPE = new StoreProcessingElement( ST, nodeNum, llyr_config );
} else if( op_binding == AND ) {
Expand Down Expand Up @@ -146,7 +141,7 @@ void LlyrMapper::addNode(opType op_binding, uint32_t nodeNum, LlyrGraph< Process

}// addNode

void LlyrMapper::addNode(opType op_binding, int64_t intConst, uint32_t nodeNum, LlyrGraph< ProcessingElement* > &graphOut,
void LlyrMapper::addNode(opType op_binding, std::string *arguments, uint32_t nodeNum, LlyrGraph< ProcessingElement* > &graphOut,
LlyrConfig* llyr_config)
{
ProcessingElement* tempPE;
Expand All @@ -157,23 +152,23 @@ void LlyrMapper::addNode(opType op_binding, int64_t intConst, uint32_t nodeNum,
SST::Output* output_ = new SST::Output(prefix, llyr_config->verbosity_, 0, Output::STDOUT);

if( op_binding == LDADDR ) {
std::queue< LlyrData > tempData;
tempData.push(LlyrData(intConst));
tempPE = new LoadProcessingElement( LD, nodeNum, llyr_config, tempData );
tempPE = new AdvLoadProcessingElement( LDADDR, nodeNum, llyr_config, arguments );
} else if( op_binding == STREAM_LD ) {
tempPE = new AdvLoadProcessingElement( STREAM_LD, nodeNum, llyr_config, arguments );
} else if( op_binding == STADDR ) {
std::queue< LlyrData > tempData;
tempData.push(LlyrData(intConst));
tempPE = new StoreProcessingElement( ST, nodeNum, llyr_config, tempData );
tempPE = new AdvStoreProcessingElement( STADDR, nodeNum, llyr_config, arguments );
} else if( op_binding == STREAM_ST ) {
tempPE = new AdvStoreProcessingElement( STREAM_ST, nodeNum, llyr_config, arguments );
} else if( op_binding == ADDCONST ) {
tempPE = new IntConstProcessingElement( ADDCONST, nodeNum, llyr_config, intConst );
tempPE = new IntConstProcessingElement( ADDCONST, nodeNum, llyr_config, arguments );
} else if( op_binding == SUBCONST ) {
tempPE = new IntConstProcessingElement( SUBCONST, nodeNum, llyr_config, intConst );
tempPE = new IntConstProcessingElement( SUBCONST, nodeNum, llyr_config, arguments );
} else if( op_binding == MULCONST ) {
tempPE = new IntConstProcessingElement( MULCONST, nodeNum, llyr_config, intConst );
tempPE = new IntConstProcessingElement( MULCONST, nodeNum, llyr_config, arguments );
} else if( op_binding == DIVCONST ) {
tempPE = new IntConstProcessingElement( DIVCONST, nodeNum, llyr_config, intConst );
tempPE = new IntConstProcessingElement( DIVCONST, nodeNum, llyr_config, arguments );
} else if( op_binding == REMCONST ) {
tempPE = new IntConstProcessingElement( REMCONST, nodeNum, llyr_config, intConst );
tempPE = new IntConstProcessingElement( REMCONST, nodeNum, llyr_config, arguments );
} else {
output_->fatal(CALL_INFO, -1, "Error: Unable to find specified operation\n");
exit(0);
Expand Down
8 changes: 3 additions & 5 deletions src/sst/elements/llyr/mappers/pyMapper.h
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Original file line number Diff line number Diff line change
Expand Up @@ -151,11 +151,9 @@ void PyMapper::mapGraph(LlyrGraph< opType > hardwareGraph, LlyrGraph< AppNode >
// encode node in hardware graph
std::map< uint32_t, Vertex< AppNode > >* app_vertex_map_ = appGraph.getVertexMap();
if( op == ADDCONST || op == SUBCONST || op == MULCONST || op == DIVCONST || op == REMCONST) {
int64_t intConst = std::stoll(app_vertex_map_->at(applicationVertex).getValue().constant_val_);
addNode( op, intConst, hardwareVertex, graphOut, llyr_config );
} else if( op == LDADDR || op == STADDR ) {
int64_t intConst = std::stoll(app_vertex_map_->at(applicationVertex).getValue().constant_val_);
addNode( op, intConst, hardwareVertex, graphOut, llyr_config );
addNode( op, app_vertex_map_->at(applicationVertex).getValue().argument_, hardwareVertex, graphOut, llyr_config );
} else if( op == LDADDR || op == STREAM_LD || op == STADDR || op == STREAM_ST ) {
addNode( op, app_vertex_map_->at(applicationVertex).getValue().argument_, hardwareVertex, graphOut, llyr_config );
} else {
addNode( op, hardwareVertex, graphOut, llyr_config );
}
Expand Down
10 changes: 5 additions & 5 deletions src/sst/elements/llyr/mappers/simpleMapper.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -87,11 +87,9 @@ void SimpleMapper::mapGraph(LlyrGraph< opType > hardwareGraph, LlyrGraph< AppNod
app_vertex_map_->at(currentAppNode).setVisited(1);
opType tempOp = app_vertex_map_->at(currentAppNode).getValue().optype_;
if( tempOp == ADDCONST || tempOp == SUBCONST || tempOp == MULCONST || tempOp == DIVCONST || tempOp == REMCONST) {
int64_t intConst = std::stoll(app_vertex_map_->at(currentAppNode).getValue().constant_val_);
addNode( tempOp, intConst, newNodeNum, graphOut, llyr_config );
} else if( tempOp == LDADDR || tempOp == STADDR ) {
int64_t intConst = std::stoll(app_vertex_map_->at(currentAppNode).getValue().constant_val_);
addNode( tempOp, intConst, newNodeNum, graphOut, llyr_config );
addNode( tempOp, app_vertex_map_->at(currentAppNode).getValue().argument_, newNodeNum, graphOut, llyr_config );
} else if( tempOp == LDADDR || tempOp == STREAM_LD || tempOp == STADDR || tempOp == STREAM_ST ) {
addNode( tempOp, app_vertex_map_->at(currentAppNode).getValue().argument_, newNodeNum, graphOut, llyr_config );
} else {
addNode( tempOp, newNodeNum, graphOut, llyr_config );
}
Expand Down Expand Up @@ -211,6 +209,8 @@ void SimpleMapper::mapGraph(LlyrGraph< opType > hardwareGraph, LlyrGraph< AppNod
vertex_map_->at(currentNode).getValue()->queueInit();
} else if( tempOp == LDADDR || tempOp == STADDR ) {
vertex_map_->at(currentNode).getValue()->queueInit();
} else if( tempOp == STREAM_LD || tempOp == STREAM_ST ) {
vertex_map_->at(currentNode).getValue()->queueInit();
}
}

Expand Down
40 changes: 23 additions & 17 deletions src/sst/elements/llyr/parser/parser.cc
View file
Original file line number Diff line number Diff line change
Expand Up @@ -88,7 +88,7 @@ void Parser::generateAppGraph(std::string functionName)
output_->verbose(CALL_INFO, 1, 0, "Finished parsing...\n");

printCDFG( "00_func-ins.dot" );
printPyMapper( "00_amapper.out" );
printPyMapper( "00_amapper.dot" );

}// generateAppGraph

Expand Down Expand Up @@ -1730,38 +1730,40 @@ void Parser::printPyMapper( const std::string fileName ) const
if ( !outputFile ) //check to be sure file is open
std::cerr << "Error opening file.";

outputFile << "## model intput" << "\n";
outputFile << "// model intput" << "\n";
outputFile << "strict digraph {" << "\n";

//need this for type size but there should be a better way
llvm::DataLayout* dataLayout = new llvm::DataLayout(mod_);

auto funcVertexMap = functionGraph_->getVertexMap();
for( auto vertexIterator = funcVertexMap->begin(); vertexIterator != funcVertexMap ->end(); ++vertexIterator ) {

bool swapped = 0;
llvm::Instruction* tempInstruction = vertexIterator->second.getValue()->instruction_;
if( tempInstruction != NULL ) {
std::cout << "vertex: " << vertexIterator->first << "\n";

//temp const vector
std::map< uint32_t, std::string > constVector;
//write node ID
outputFile << vertexIterator->first << ": ";
outputFile << vertexIterator->first << " [";
outputFile << std::flush;

//write operands
bool first = 0;
outputFile << "input[ ";
outputFile << "input=" << "\"";
for( auto operandIter = tempInstruction->op_begin(), operandEnd = tempInstruction->op_end(); operandIter != operandEnd; ++operandIter ) {
if( first != 0 ) {
outputFile << ", ";
outputFile << ":";
} else {
first = 1;
}

std::cout << operandIter->get()->getNameOrAsOperand() << " -- boopA" << std::endl;

if( llvm::isa<llvm::Constant>(operandIter) ) {
std::cout << operandIter->getOperandNo() << ": ";
std::cout << operandIter->getOperandNo() << "\":";
std::cout << vertexIterator->second.getValue()->intConst_ << " ";
std::cout << vertexIterator->second.getValue()->floatConst_ << " ";
std::cout << vertexIterator->second.getValue()->doubleConst_ << " ";
Expand Down Expand Up @@ -1796,34 +1798,38 @@ void Parser::printPyMapper( const std::string fileName ) const
}

}//end for
outputFile << " ]";
outputFile << "\"" << ", ";

//write constants
outputFile << " consts[ ";
for( auto it = constVector.begin(); it != constVector.end(); it++ ) {
outputFile << it->second << ", " << it->first;
outputFile << "consts=" << "\"";
for( auto it = constVector.begin(); it != constVector.end(); ) {
outputFile << it->second << ":" << it->first;
++it;
if( it != constVector.end() ) {
outputFile << "\":";
}
}
outputFile << " ]";
outputFile << "\"" << ", ";

//write outputs
llvm::Value* returnval = llvm::cast<llvm::Value>(tempInstruction);
outputFile << " output[ ";
outputFile << "output=" << "\"";
if( returnval->hasName() == 1 ) {
outputFile << returnval->getName().str();
}
outputFile << " ]";
outputFile << "\"" << ", ";

//write op
outputFile << " op[ ";
outputFile << "op=" << "\"";
outputFile << tempInstruction->getOpcodeName();
outputFile << " ]";
outputFile << "\"" << ", ";

//write type
outputFile << " type[ ";
outputFile << "type=" << "\"";
if( tempInstruction->getType()->isSized() ) {
outputFile << dataLayout->getTypeStoreSize(tempInstruction->getType());
}
outputFile << " ]";
outputFile << "\"" << "];";

//finish
outputFile << "\n";
Expand Down
5 changes: 3 additions & 2 deletions src/sst/elements/llyr/pes/intPE.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -158,9 +158,10 @@ class IntConstProcessingElement : public IntProcessingElement
{
public:
IntConstProcessingElement(opType op_binding, uint32_t processor_id, LlyrConfig* llyr_config,
int64_t int_const) :
IntProcessingElement(op_binding, processor_id, llyr_config), int_const_(int_const)
std::string *arguments) :
IntProcessingElement(op_binding, processor_id, llyr_config)
{
int_const_ = std::stoll(arguments[0]);
input_queues_= new std::vector< LlyrQueue* >;
output_queues_ = new std::vector< LlyrQueue* >;
}
Expand Down
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