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An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!

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samreenislam/litex-buildenv

 
 

Some directions for this MATRIX Voice fork

Main changes include:

  • Adding matrix_voice definitions to platforms folder
  • Adding matrix_voice SoC configurations to targets folder
  • Adding our DDR2 RAM definition in modules.py in the repo's main folder which is supposed to replace third_party/litedram/litedram/modules.py

Primarily followed the instructions here for the Mimas V2.

Make sure to have the Xilinx ISE installed to compile for the MATRIX Voice's Spartan-6. Follow the steps here to do so.

First cloned the following repos in folder of choice

git clone https://github.com/samreenislam/litex-buildenv.git
git clone https://github.com/litex-hub/litex-buildenv-udev

From second repo, copy 99-hdmi2usb-permissions.rules permission to /etc/udev/rules.d and /lib/udev/rules.d. Log out of terminal session & log back in.

Enter litex-buildenv repo and run the following

cd litex-buildenv

CPU=vexriscv
PLATFORM=matrix_voice
TARGET=base
FIRMWARE=micropython
export CPU PLATFORM TARGET FIRMWARE

Then run the following script for the appropriate external module downloads

scripts/download-env.sh
  • Copy modules.py in the main folder of the repo and replace the modules.py file in third_party/litedram/litedram with it. This is to include the MATRIX Voice's DDR2 RAM module definition.

  • Copy matrix_voice.py in the platforms folder of the repo into third_party/migen/migen/build/platforms.

Then enter the environment.

source scripts/enter-env.sh

At this point, you should have a prompt similar to (LX P=matrix_voice C=vexriscv F=micropython).

Then build the FPGA bit file as stated in the article linked above with

make gateware

Compile the micropython firmware with the following

scripts/build-micropython.sh

Flash the top.bit file to the MATRIX Voice's Spartan-6 using the directions here.

TO-DO: Flash BIOS onto FPGA SoC after flashing top.bit.


LiteX Build Environment

The LiteX Build Environment is a tool for easily developing LiteX based systems. It was originally designed to make the TimVideos' HDMI2USB easy to develop, but has now expanded to support multiple projects.

Quick Links


Important Terminology

  • Gateware - The FPGA configuration.
  • Soft CPU - A CPU running inside the FPGA.
  • Firmware - The software running on the soft CPU inside the FPGA.

Structure

LiteX BuildEnv Structure Image

The LiteX Build Environment supports a large number of FPGA boards, but not all boards can be used for all projects.

  • HDMI2USB - The firmware currently used for the HDMI2USB project.
  • Bare Metal - Your own firmware running directly on the soft CPU in the FPGA.
  • Zephyr - Support for Zephyr RTOS.
  • Linux - Support for Linux.

The Gateware is the configuration which generates our FPGA bitstream. It is generally defined by a platform and a target. You can find details for these under the platform and target directories in this project.

  • Platform - Represents the FPGA platform/devboard for which we will build the bitstream. (i.e. sim (Verilator Simulator), arty , opsis)
  • Target - There are multiple targets for each platform, this represents an SoC configuration for our target application. (i.e. base, net, video)

The environment is the shell setup and software packages provided by litex-buildenv which allow for litex based FPGA development. It provides development, build and troubleshooting capabilities.

To bootstrap or update your environment one generally does:

# Download the debian packages needed to support litex environment.  Usually
# we only do this once.
./scripts/download-env-root.sh

# Download/update the litex specific packages (python, verilator, submodules etc)
./scripts/download-env.sh

# Enter the Dev/Debug/Build environment
export PLATFORM=arty TARGET=net CPU=or1k
source ./scripts/enter-env.sh

FIXME: Put stuff here.

LiteX Application Relationship

FIXME: Put stuff here.


License

This code was developed by the people found in the AUTHORS file (including major contributions from EnjoyDigital) and released under a BSD/MIT license.

Code under the third_party directory comes from external sources and is available in their own licenses.

Contact

TimVideo.us:

EnjoyDigital:

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An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!

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