Use irqc mode (see timer lib) to support measuring high instruction l…

…atencies
sancus-tee · May 27, 2019 · 1f3149b · 1f3149b
1 parent 953387b
commit 1f3149b
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Showing 2 changed files with 64 additions and 5 deletions.
diff --git a/include/sancus_support/sancus_step.h b/include/sancus_support/sancus_step.h
@@ -61,7 +61,8 @@ void timerA_isr_entry(void)                                         \
             "add #0x5, r15 ;\n\t"                                   \
             "mov r15, &%5\n\t"                                      \
             "pop r15\n\t"                                           \
-            "mov %10, &%4; set timer in interrupt mode (irq)\n\t"   \
+            "mov %11, &%12; set timer in interrupt mode (irqc)\n\t" \
+            "mov %13, &%4; set timer in interrupt mode 2 (irqc)\n\t"\
             "jmp 3f\n\t"                                            \
             "1: ; sm not interrupted\n\t"                           \
             "mov %9, &%4; disable timer\n\t"                        \
@@ -78,7 +79,63 @@ void timerA_isr_entry(void)                                         \
             "m"(__ss_dbg_measuring_reti_latency),                   \
             "i"(TACTL_CONTINUOUS),                                  \
             "i"(TACTL_DISABLE),                                     \
-            "i"(TACTL_ENABLE)                                       \
+            "i"(TACTL_ENABLE),                                      \
+            "i"(TACCTL_ENABLE_CONT),                                \
+            "m"(TACCTL0),                                           \
+            "i"(TACTL_ENABLE_CONT)                                  \
+            :                                                       \
+            );                                                      \
+}
+
+#define SANCUS_STEP_ISR_ENTRY2(fct)                                 \
+__attribute__((naked)) __attribute__((interrupt(TIMER_IRQ_VECTOR2)))\
+void timerA_isr_entry2(void)                                        \
+{                                                                   \
+    __asm__("mov &%0, &%2; save tar\n\t"                            \
+            "mov %9, &%4; disable timer\n\t"                        \
+            "sub &%5, &%2; subtract TACCR0 from timestamp\n\t"      \
+            "mov #0x0, &%1\n\t"                                     \
+            "cmp #0x0, r1\n\t"                                      \
+            "jne 1f\n\t"                                            \
+            "; sm got interrupted\n\t"                              \
+            "mov #0x1, &%1\n\t"                                     \
+            "mov &%3, r1\n\t"                                       \
+            "push r15\n\t"                                          \
+            "push #0x0\n\t"                                         \
+            "cmp #0x0, &%7\n\t"                                     \
+            "jz 2f\n\t"                                             \
+            "; measuring __ss_isr_reti_latency\n\t"                 \
+            "mov %8, &%4; set timer in continuous mode\n\t"         \
+            "jmp 3f\n\t"                                            \
+            "2: ; not measuring __ss_isr_reti_latency\n\t"          \
+            "call #" #fct "\n\t"                                    \
+            "push r15\n\t"                                          \
+            "mov &%6, r15\n\t"                                      \
+            "add #0x6, r15 ;\n\t"                                   \
+            "mov r15, &%5\n\t"                                      \
+            "pop r15\n\t"                                           \
+            "mov %11, &%12; set timer in interrupt mode (irqc)\n\t" \
+            "mov %13, &%4; set timer in interrupt mode 2 (irqc)\n\t"\
+            "jmp 3f\n\t"                                            \
+            "1: ; sm not interrupted\n\t"                           \
+            "mov %9, &%4; disable timer\n\t"                        \
+            "3: reti\n\t"                                           \
+            :                                                       \
+            :                                                       \
+            "m"(TAR),                                               \
+            "m"(__ss_isr_interrupted_sm),                           \
+            "m"(__ss_isr_tar_entry),                                \
+            "m"(__isr_sp),                                          \
+            "m"(TACTL),                                             \
+            "m"(TACCR0),                                            \
+            "m"(__ss_isr_reti_latency),                             \
+            "m"(__ss_dbg_measuring_reti_latency),                   \
+            "i"(TACTL_CONTINUOUS),                                  \
+            "i"(TACTL_DISABLE),                                     \
+            "i"(TACTL_ENABLE),                                      \
+            "i"(TACCTL_ENABLE_CONT),                                \
+            "m"(TACCTL0),                                           \
+            "i"(TACTL_ENABLE_CONT)                                  \
             :                                                       \
             );                                                      \
 }

diff --git a/src/sancus-step/sancus_step.c b/src/sancus-step/sancus_step.c
@@ -46,7 +46,7 @@ void __ss_init(void)
     timer_tsc_start();
     __ss_dbg_get_info();
 
-    timer_irq(__ss_dbg_entry_delay);
+    timer_irqc(__ss_dbg_entry_delay);
     int isr_reti_latency_t = __ss_dbg_get_info();
     /* amount of cycles in the reti logic = measured delay
                                   - record delay
@@ -58,10 +58,12 @@ void __ss_init(void)
                         - RETI_LENGTH
                         + 1;
 
-    timer_irq(__ss_dbg_entry_delay + EXTRA_DELAY);
+    timer_irqc(__ss_dbg_entry_delay + EXTRA_DELAY);
     __ss_dbg_get_info();
     __ss_sm_exit_latency = __ss_isr_tar_entry - ENTRY_DELAY;
-    printf("%d, %d, %d\n", __ss_isr_reti_latency, __ss_sm_exit_latency, __ss_dbg_entry_delay);
+    printf("resume latency: %d\n", __ss_isr_reti_latency);
+    printf("exit latency: %d\n", __ss_sm_exit_latency);
+    printf("entry delay: %d\n", __ss_dbg_entry_delay);
 
     __ss_dbg_measuring_reti_latency = 0;
 }