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Sancus-step debug module v1.0
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Sven-C committed Mar 3, 2019
1 parent d0aed58 commit a6c8961
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Showing 2 changed files with 127 additions and 68 deletions.
74 changes: 29 additions & 45 deletions include/sancus_support/sancus_step.h
Original file line number Diff line number Diff line change
Expand Up @@ -7,16 +7,13 @@


/* ======== SANCUS STEP DBG CONSTANTS ======== */
#define RETI_LENGTH 0x5
#define SS_DBG_RECORD_DELAY 0x8
#define RETI_LENGTH (0x5)
#define JMP_LENGTH (0x2)
#define RET_LENGTH (0x3)

// note the difference between the decimal and the hexadecimal constants
#define HW_IRQ_LATENCY 34
#define ISR_STACK_SIZE 512
#define INIT_LATENCY 0
#define EXTRA_DELAY (0x2)

#define SANCUS_STEP_ISR(fct) \
SANCUS_STEP_ISR_INTERNAL(fct, 0x42, 0x212)
#define INIT_LATENCY 1

void print_latency(void);
int get_latency(void);
Expand All @@ -27,48 +24,35 @@ void sancus_step_init(void);
void sancus_step_end(void);
void sancus_step_isr_main(void);

int ss_dbg_interrupted;
int ss_dbg_entry_delay;
int isr_latency;
int ss_dbg_measuring_reti_latency;
int isr_reti_latency;
int sm_exit_latency;
int isr_interrupted_sm;

extern struct SancusModule ssdbg;
int SM_ENTRY(ssdbg) ss_dbg_get_isr_latency(void);
int SM_ENTRY(ssdbg) ss_dbg_get_info(void);

uint16_t __ss_isr_stack[ISR_STACK_SIZE];
void* __ss_isr_sp;
volatile int __ss_isr_tar_entry;

/*
* The first latency will be useless, but this is ok for now.
* We can fix this by adjusting the INIT_LATENCY definition.
*/
#define SANCUS_STEP_INIT \
__asm__("dint\n\t"); \
TACTL = TACTL_DISABLE; \
TACCR0 = INIT_LATENCY; \
/* source mclk, up mode */ \
TACTL = TACTL_ENABLE;

/*
* Execute fct after every instruction of the sancus module
*/
#define SANCUS_STEP_ISR_INTERNAL(fct, sm_reti_val, ta_enable) \
__asm__("mov &%0, &__ss_isr_tar_entry \n\t" \
"cmp #0x0, r1 \n\t" \
"jne 1f \n\t" \
"; sm got interrupted \n\t" \
"mov &__ss_isr_sp, r1 \n\t" \
"push r15 \n\t" \
"push #0x0 \n\t" \
"call #" #fct " \n\t" \
"mov #" #sm_reti_val ", &%1 \n\t" \
"mov #" #ta_enable ", &%2 \n\t" \
"jmp 2f \n\t" \
"1: \n\t" \
"; no sm interrupted \n\t" \
"mov #0x4, &%2 ;disable timerA \n\t" \
"2: ; cont after if-then-else \n\t" \
"reti \n\t" \
::"m"(TAR),"m"(TACCR0),"m"(TACTL):);
#define SANCUS_STEP_ISR_ENTRY(fct) \
__attribute__((naked)) __attribute__((interrupt(TIMER_IRQ_VECTOR))) \
void timerA_isr_entry(void) \
{ \
__asm__("mov &%0, &__ss_isr_tar_entry\n\t" \
"cmp #0x0, r1\n\t" \
"jne 1f\n\t" \
"; sm got interrupted\n\t" \
"mov #0x1, &isr_interrupted_sm\n\t" \
"jmp cont\n\t" \
"1: mov #0x0, &isr_interrupted_sm\n\t" \
"cont:\n\t" \
"mov &__isr_sp, r1\n\t" \
"push r15\n\t" \
"push #0x0\n\t" \
"call #" #fct "\n\t" \
"reti\n\t" \
::"m"(TAR):); \
}

#endif
121 changes: 98 additions & 23 deletions src/sancus-step/sancus_step.c
Original file line number Diff line number Diff line change
Expand Up @@ -2,28 +2,29 @@
#include "timer.h"
#include <stdio.h>
#include <sancus/sm_support.h>

void* __ss_isr_sp = &__ss_isr_stack[ISR_STACK_SIZE-1];
#include "sm_io.h"

void print_latency(void)
{
TACTL = TACTL_DISABLE;
int latency = __ss_isr_tar_entry - HW_IRQ_LATENCY - 1;
int latency = get_latency();
printf("latency: %d\n", latency);
}

int get_latency(void)
{
TACTL = TACTL_DISABLE;
return __ss_isr_tar_entry - HW_IRQ_LATENCY - 1;
return __ss_isr_tar_entry - sm_exit_latency;
}

int ss_dbg_entry_delay = 0;
int ss_dbg_interrupted = 0;
int isr_latency = 0;
int ss_dbg_measuring_reti_latency = 0;
int isr_reti_latency = 0;
int sm_exit_latency = 0;
int isr_interrupted_sm = 0;

/*
* Determines isr_latency (reti into interrupted module)
* Determines isr_reti_latency (reti into interrupted module)
* and sm_exit_latency (from interrupt to isr)
* and starts timer, so that nemesis can be executed
*/
void sancus_step_start(void)
Expand All @@ -34,44 +35,118 @@ void sancus_step_start(void)
}

/*
* Determines isr_latency (reti into interrupted moduled)
* Determines isr_reti_latency (reti into interrupted moduled)
* and sm_exit_latency (from interrupt to isr)
*/
void sancus_step_init(void)
{
ss_dbg_interrupted = 0;
sancus_enable(&ssdbg);

ss_dbg_measuring_reti_latency = 1;

timer_tsc_start();
int isr_latency_t = ss_dbg_get_isr_latency();
ss_dbg_get_info();

timer_irq(ss_dbg_entry_delay);
isr_latency_t = ss_dbg_get_isr_latency();
int isr_reti_latency_t = ss_dbg_get_info();
/* amount of cycles in the reti logic = measured delay
- record delay
- duration of reti instruction
+ 1 (because we count amount of cycles)
*/
isr_latency = isr_latency_t - SS_DBG_RECORD_DELAY - RETI_LENGTH + 1;
isr_reti_latency = isr_reti_latency_t
- JMP_LENGTH
- RET_LENGTH
- RETI_LENGTH
+ 1;

timer_irq(ss_dbg_entry_delay + EXTRA_DELAY);
ss_dbg_get_info();
sm_exit_latency = __ss_isr_tar_entry - 3;
printf("%d, %d, %d\n", isr_reti_latency, sm_exit_latency, ss_dbg_entry_delay);

ss_dbg_measuring_reti_latency = 0;
}

void sancus_step_end(void)
{
TACTL = TACTL_DISABLE;
}

__attribute__((naked))
void sancus_step_isr_main(void)
{

__asm__ __volatile__(
"cmp #0x0, &%2\n\t"
"jz 1f\n\t"
";sm interrupted\n\t"
"cmp #0x0, &%3\n\t"
"jz 3f\n\t"
"; measuring isr_reti_latency\n\t"
"mov #0x4, &%0\n\t"
"mov #0x220, &%0\n\t"
"jmp 2f\n\t"
"3: ; not measuring isr_reti_latency\n\t"
"call #print_latency\n\t"
"mov #0x4, &%0\n\t"
"push r15\n\t"
"mov &%4, r15\n\t"
"add #0x8, r15 ;\n\t"
"mov r15, &%1\n\t"
"pop r15\n\t"
"mov #0x212, &%0\n\t"
"jmp 2f\n\t"
"1: ; sm not interrupted\n\t"
"call #timer_disable\n\t"
"2: ret\n\t"
:
:
"m"(TACTL),
"m"(TACCR0),
"m"(isr_interrupted_sm),
"m"(ss_dbg_measuring_reti_latency),
"m"(isr_reti_latency));
/*
if (isr_interrupted_sm)
{
if (ss_dbg_measuring_reti_latency)
{
TACTL = TACTL_DISABLE;
TACTL = TACTL_CONTINUOUS;
}
else
{
print_latency();
timer_irq(isr_reti_latency);
}
}
else
{
timer_disable();
}
*/
}

DECLARE_SM(ssdbg, 0x1234);

int SM_ENTRY(ssdbg) ss_dbg_get_isr_latency(void)
__attribute__((naked))
int SM_ENTRY(ssdbg) ss_dbg_get_info(void)
{
/*
ss_dbg_entry_delay = TAR;
if (!ss_dbg_interrupted)
{
return 0;
}
else
{
return TAR;
}
int rv = TAR;
TACTL = TACTL_DISABLE;
TACTL = TACTL_CONTINUOUS;
return rv;
*/

__asm__ __volatile__(
"mov &%0, &ss_dbg_entry_delay\n\t"
"mov &%0, r15\n\t"
"mov #0x4, &%1\n\t"
"mov #0x220, &%1\n\t"
"sub #0x1, r15\n\t"
"ret\n\t"
::"m"(TAR), "m"(TACTL):
);
}

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