Skip to content

Commit

Permalink
Merge pull request casper-astro#173 from mitchburnett/m2021a
Browse files Browse the repository at this point in the history
rfsoc fixes
mitchburnett authored Sep 4, 2022
2 parents e2c536c + fd499d4 commit 7583c34
Showing 4 changed files with 11 additions and 3 deletions.
4 changes: 4 additions & 0 deletions jasper_library/toolflow.py
Original file line number Diff line number Diff line change
@@ -1549,6 +1549,10 @@ def compile(self):
xsct_tcl = os.path.join(self.compile_dir, 'xsct_gogogo.tcl')
helpers.write_file(xsct_tcl, xc)

# TODO removing `XILINX_PATH` here is a hack for now to work updating Vitis 2020.2 to Vitis 2021.1
# for newer versions of the tools `XILINX_PATH` is an env var that Xilinx uses for their Vitis tool
# and our library env var clobbers it causing xsct to fail when starting
del os.environ['XILINX_PATH']
rv = os.system('xsct {:s}'.format(xsct_tcl))
if rv:
raise Exception('xsct (Vitis) failed!')
3 changes: 2 additions & 1 deletion jasper_library/yellow_blocks/rfdc.py
Original file line number Diff line number Diff line change
@@ -590,7 +590,8 @@ def gen_tcl_cmds(self):

# place the rfdc
rfdc_bd_name = 'usp_rf_data_converter_0'#rfdc'
tcl_cmds['pre_synth'] += ['create_bd_cell -type ip -vlnv xilinx.com:ip:usp_rf_data_converter:2.4 {:s}'.format(rfdc_bd_name)]
# TODO better handle version information, the version string was manually increasesd when testing for > Vivado 2020.2
tcl_cmds['pre_synth'] += ['create_bd_cell -type ip -vlnv xilinx.com:ip:usp_rf_data_converter:2.5 {:s}'.format(rfdc_bd_name)]

# get a reference to the rfdc in the block design, currently assume that only one rfdc is in the design (decent assumption)
tcl_cmds['pre_synth'] += ['set rfdc [get_bd_cells -filter { NAME =~ *usp_rf_data_converter*}]']
4 changes: 2 additions & 2 deletions startup.m
Original file line number Diff line number Diff line change
@@ -7,7 +7,7 @@
jasper_backend = getenv('JASPER_BACKEND');

%if vivado is to be used
if strcmp(jasper_backend, 'vivado') || isempty(jasper_backend)
if strcmp(jasper_backend, 'vivado') || strcmp(jasper_backend, 'vitis') || isempty(jasper_backend)
disp('Starting Model Composer')
addpath([getenv('MLIB_DEVEL_PATH'), '/casper_library']);
addpath([getenv('MLIB_DEVEL_PATH'), '/xps_library']);
@@ -31,7 +31,7 @@
xlAddSysgen([getenv('XILINX_PATH'), '/ISE'])
sysgen_startup
else
fprintf('Unknown JASPER_BACKEND ''%s''\n', jasper_library);
fprintf('Unknown JASPER_BACKEND ''%s''\n', jasper_backend);
% Hopefully helpful in this case
addpath([getenv('MLIB_DEVEL_PATH'), '/casper_library']);
addpath([getenv('MLIB_DEVEL_PATH'), '/xps_library']);
3 changes: 3 additions & 0 deletions xps_library/rfdc_mask.m
Original file line number Diff line number Diff line change
@@ -46,6 +46,9 @@
return
end

% Disable link
set_param(blk, 'LinkStatus', 'inactive');

msk = Simulink.Mask.get(gcb);

[gen, tile_arch, fs_max, fs_min] = get_rfsoc_properties(gcb);

0 comments on commit 7583c34

Please sign in to comment.