First commit

Signed-off-by:  <[email protected]>

.gitattributes

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+# used to remove files from deployment using `git archive`
+# git files
+.gitattributes export-ignore
+.gitignore export-ignore
+.mailmap export-ignore

.gitignore

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+*.o
+*.a
+*.d
+.dir
+
+outdir
+samples/libc/minimal-*-O?
+linux2/
+host/x86-linux2/bin/gen*
+host/x86-linux2/bin/bin2hex
+host/x86-linux2/bin/dec2hex
+host/x86-linux2/bin/mkevents
+host/x86-linux2/bin/sysgen

.mailmap

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+Dirk Brandewie <[email protected]> <[email protected]>

arch/arc/bsp/fatal_error.c

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+/* fatal_error.c - ARCv2 system fatal error handler */
+
+/*
+ * Copyright (c) 2014 Wind River Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1) Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2) Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3) Neither the name of Wind River Systems nor the names of its contributors
+ * may be used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+DESCRIPTION
+This module provides the _SysFatalErrorHandler() routine for ARCv2 BSPs.
+*/
+
+/* includes */
+
+#include <cputype.h>
+#include <nanokernel.h>
+#include <nanokernel/cpu.h>
+#include <toolchain.h>
+#include <sections.h>
+#include "board.h"
+
+#ifdef CONFIG_PRINTK
+#include <misc/printk.h>
+#define PRINTK(...) printk(__VA_ARGS__)
+#else
+#define PRINTK(...)
+#endif
+
+#ifdef CONFIG_MICROKERNEL
+extern void _TaskAbort(void);
+static inline void nonEssentialTaskAbort(void)
+{
+	PRINTK("Fatal fault in task ! Aborting task.\n");
+	_TaskAbort();
+}
+#define NON_ESSENTIAL_TASK_ABORT() nonEssentialTaskAbort()
+#else
+#define NON_ESSENTIAL_TASK_ABORT() \
+	do {/* nothing */          \
+	} while ((0))
+#endif
+
+/*******************************************************************************
+*
+* _SysFatalErrorHandler - fatal error handler
+*
+* This routine implements the corrective action to be taken when the system
+* detects a fatal error.
+*
+* This sample implementation attempts to abort the current context and allow
+* the system to continue executing, which may permit the system to continue
+* functioning with degraded capabilities.
+*
+* System designers may wish to enhance or substitute this sample
+* implementation to take other actions, such as logging error (or debug)
+* information to a persistent repository and/or rebooting the system.
+*
+* RETURNS: N/A
+*
+* \NOMANUAL
+*/
+
+void _SysFatalErrorHandler(
+	unsigned int reason, /* fatal error reason */
+	const NANO_ESF *pEsf /* pointer to exception stack frame */
+)
+{
+	nano_context_type_t curCtx = context_type_get();
+
+	ARG_UNUSED(reason);
+	ARG_UNUSED(pEsf);
+
+	if ((curCtx == NANO_CTX_ISR) || _context_essential_check(NULL)) {
+		PRINTK("Fatal fault in %s ! Spinning...\n",
+		       NANO_CTX_ISR == curCtx
+			       ? "ISR"
+			       : NANO_CTX_FIBER == curCtx ? "essential fiber"
+							  : "essential task");
+		for (;;)
+			; /* spin forever */
+	}
+
+	if (NANO_CTX_FIBER == curCtx) {
+		PRINTK("Fatal fault in fiber ! Aborting fiber.\n");
+		fiber_abort();
+		return;
+	}
+
+	NON_ESSENTIAL_TASK_ABORT();
+}

arch/arc/bsp/prep_c.c

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+/* prep_c.c - full C support initialization */
+
+/*
+ * Copyright (c) 2014 Wind River Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1) Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2) Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3) Neither the name of Wind River Systems nor the names of its contributors
+ * may be used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+DESCRIPTION
+
+Initialization of full C support: zero the .bss, copy the .data if XIP,
+call _Cstart().
+
+Stack is available in this module, but not the global data/bss until their
+initialization is performed.
+*/
+
+#include <stdint.h>
+#include <toolchain.h>
+#include <linker-defs.h>
+
+/*******************************************************************************
+*
+* bssZero - clear BSS
+*
+* This routine clears the BSS region, so all bytes are 0.
+*
+* RETURNS: N/A
+*/
+
+static void bssZero(void)
+{
+	volatile uint32_t *pBSS = (uint32_t *)&__bss_start;
+	unsigned int n;
+
+	for (n = 0; n < (unsigned int)&__bss_num_words; n++) {
+		pBSS[n] = 0;
+	}
+}
+
+/*******************************************************************************
+*
+* dataCopy - copy the data section from ROM to RAM
+*
+* This routine copies the data section from ROM to RAM.
+*
+* RETURNS: N/A
+*/
+
+#ifdef CONFIG_XIP
+static void dataCopy(void)
+{
+	volatile uint32_t *pROM = (uint32_t *)&__data_rom_start;
+	volatile uint32_t *pRAM = (uint32_t *)&__data_ram_start;
+	unsigned int n;
+
+	for (n = 0; n < (unsigned int)&__data_num_words; n++) {
+		pRAM[n] = pROM[n];
+	}
+}
+#else
+static void dataCopy(void)
+{
+}
+#endif
+
+extern FUNC_NORETURN void _Cstart(void);
+/*******************************************************************************
+*
+* _PrepC - prepare to and run C code
+*
+* This routine prepares for the execution of and runs C code.
+*
+* RETURNS: N/A
+*/
+
+void _PrepC(void)
+{
+	bssZero();
+	dataCopy();
+	_Cstart();
+	CODE_UNREACHABLE;
+}

arch/arc/bsp/reset.s

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+/* reset.s - reset handler */
+
+/*
+ * Copyright (c) 2014 Wind River Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1) Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2) Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3) Neither the name of Wind River Systems nor the names of its contributors
+ * may be used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+DESCRIPTION
+Reset handler that prepares the system for running C code.
+*/
+
+#define _ASMLANGUAGE
+
+#include <board.h>
+#include <toolchain.h>
+#include <sections.h>
+#include <nanokernel/cpu.h>
+
+#define _RAM_END (CONFIG_RAM_START + CONFIG_RAM_SIZE)
+
+GTEXT(__reset)
+
+/*******************************************************************************
+*
+* __reset - reset vector
+*
+* Ran when the system comes out of reset. The processor is at supervisor level.
+*
+* Locking interrupts prevents anything from interrupting the CPU.
+*
+* When these steps are completed, jump to _PrepC(), which will finish setting
+* up the system for running C code.
+*
+* RETURNS: N/A
+*/
+
+SECTION_FUNC(TEXT,__reset)
+
+	/* lock interrupts: will get unlocked when switch to main task */
+	clri
+
+	/* setup a stack at the end of the RAM */
+	mov sp, _RAM_END
+
+	j @_PrepC