[AArch64, X86] Guard against both instrs being wild cards

If both instrs are wild cards, the result can be a crash. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295776 91177308-0d34-0410-b5e6-96231b3b80d8
stryku · Feb 21, 2017 · 6a905f6 · 6a905f6
1 parent bcd633d
commit 6a905f6
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Showing 2 changed files with 12 additions and 10 deletions.
diff --git a/lib/Target/AArch64/AArch64MacroFusion.cpp b/lib/Target/AArch64/AArch64MacroFusion.cpp
@@ -34,12 +34,13 @@ static bool shouldScheduleAdjacent(const AArch64InstrInfo &TII,
                                    const AArch64Subtarget &ST,
                                    const MachineInstr *First,
                                    const MachineInstr *Second) {
+  assert((First || Second) && "At least one instr must be specified");
   unsigned FirstOpcode =
-      First ? First->getOpcode()
-            : static_cast<unsigned>(AArch64::INSTRUCTION_LIST_END);
+    First ? First->getOpcode()
+	  : static_cast<unsigned>(AArch64::INSTRUCTION_LIST_END);
   unsigned SecondOpcode =
-      Second ? Second->getOpcode()
-             : static_cast<unsigned>(AArch64::INSTRUCTION_LIST_END);
+    Second ? Second->getOpcode()
+           : static_cast<unsigned>(AArch64::INSTRUCTION_LIST_END);
 
   if (ST.hasArithmeticBccFusion())
     // Fuse CMN, CMP, TST followed by Bcc.

diff --git a/lib/Target/X86/X86MacroFusion.cpp b/lib/Target/X86/X86MacroFusion.cpp
@@ -44,12 +44,13 @@ static bool shouldScheduleAdjacent(const X86Subtarget &ST,
     FuseInc
   } FuseKind;
 
+  assert((First || Second) && "At least one instr must be specified");
   unsigned FirstOpcode = First
-                             ? First->getOpcode()
-                             : static_cast<unsigned>(X86::INSTRUCTION_LIST_END);
-  unsigned SecondOpcode =
-      Second ? Second->getOpcode()
-             : static_cast<unsigned>(X86::INSTRUCTION_LIST_END);
+                         ? First->getOpcode()
+                         : static_cast<unsigned>(X86::INSTRUCTION_LIST_END);
+  unsigned SecondOpcode = Second
+                          ? Second->getOpcode()
+                          : static_cast<unsigned>(X86::INSTRUCTION_LIST_END);
 
   switch (SecondOpcode) {
   default:
@@ -215,7 +216,7 @@ void X86MacroFusion::apply(ScheduleDAGInstrs *DAGInstrs) {
   // For now, assume targets can only fuse with the branch.
   SUnit &ExitSU = DAG->ExitSU;
   MachineInstr *Branch = ExitSU.getInstr();
-  if (!shouldScheduleAdjacent(ST, nullptr, Branch))
+  if (!Branch || !shouldScheduleAdjacent(ST, nullptr, Branch))
     return;
 
   for (SDep &PredDep : ExitSU.Preds) {