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docs/arm64: cpu-feature-registers: Rewrite bitfields that don't follo…
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…w [e, s]

Commit "docs/arm64: cpu-feature-registers: Documents missing visible
fields" added bitfields following the convention [s, e]. However, the
documentation is following [s, e] and so does the Arm ARM.

Rewrite the bitfields to match the format [s, e].

Fixes: a8613e7 ("docs/arm64: cpu-feature-registers: Documents missing visible fields")
Signed-off-by: Julien Grall <[email protected]>
Signed-off-by: Catalin Marinas <[email protected]>
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Julien Grall authored and ctmarinas committed Nov 1, 2019
1 parent a8613e7 commit 478016c
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions Documentation/arm64/cpu-feature-registers.rst
Original file line number Diff line number Diff line change
Expand Up @@ -193,9 +193,9 @@ infrastructure:
+------------------------------+---------+---------+
| Name | bits | visible |
+------------------------------+---------+---------+
| SB | [36-39] | y |
| SB | [39-36] | y |
+------------------------------+---------+---------+
| FRINTTS | [32-35] | y |
| FRINTTS | [35-32] | y |
+------------------------------+---------+---------+
| GPI | [31-28] | y |
+------------------------------+---------+---------+
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