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Renamed csr.[ch] to clint.[ch], moved some code around and did some c…
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…leanup, no logic change
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telos27 committed Dec 16, 2023
1 parent 4f8adfe commit 1586cab
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Showing 5 changed files with 40 additions and 51 deletions.
39 changes: 7 additions & 32 deletions csr.c → clint.c
Original file line number Diff line number Diff line change
@@ -1,43 +1,18 @@
// csr.c: CSR-related handling
// clint.c: CLINT, UART emulation
#include <stdint.h>
#include <windows.h>
#include <conio.h>
#include <stdio.h>

#include "csr.h"
#include "clint.h"

#define NO_CSRS 4096

// explicit init function?
static uint32_t CSRs[NO_CSRS];

// visible through memory I/O
// CLINT I/O registers
static uint32_t timer_l = 0; // part of CLINT, mtime in SiFive doc
static uint32_t timer_h = 0;
static uint32_t timer_match_l = 0; // part of CLINT, mtimecmp in SiFive doc
static uint32_t timer_match_h = 0;

extern uint32_t no_readkbhit;

uint32_t read_CSR(uint32_t CSR_no)
{
if (CSR_no == CSR_MISA)
return 0x40401101;
else if (CSR_no == CSR_MVENDORID)
return 0xff0fff0f;
else if (CSR_no == CSR_CYCLE)
return no_cycles;
else if (CSR_no & 0xc00) {
//printf("read_CSR: 0x%x\n", CSR_no);
}
return CSRs[CSR_no];
}

uint32_t write_CSR(uint32_t CSR_no, uint32_t value)
{
CSRs[CSR_no] = value;
return 1;
}

uint32_t io_read(uint32_t addr, uint32_t *data)
{
Expand Down Expand Up @@ -131,15 +106,15 @@ if (is_escape_sequence)
// increment timer and also see if we've exceeded threshold
uint32_t run_clint()
{
uint32_t interrupt = 0;
uint32_t gen_interrupt = 0;

static uint64_t last_time = 0;
uint64_t elapsed_time = 0;

if (last_time == 0) {
// initialize last_time
last_time = get_microseconds();
return interrupt;
return gen_interrupt;
} else {
// calculate current time and update timer
elapsed_time = get_microseconds() - last_time;
Expand Down Expand Up @@ -167,8 +142,8 @@ uint32_t run_clint()
// generate interrupt only if it's enabled
// MIP.MTIP , MIE.MTIE , MSTATUS.MIE
if ((mip&0x80) && (mie&0x80) && (mstatus & 0x8)) {
interrupt = 0x80000007;
gen_interrupt = 0x80000007;
}
return interrupt;
return gen_interrupt;
}

3 changes: 0 additions & 3 deletions csr.h → clint.h
Original file line number Diff line number Diff line change
Expand Up @@ -30,9 +30,6 @@

extern uint32_t no_cycles, wfi;

uint32_t read_CSR(uint32_t CSR_no);
uint32_t write_CSR(uint32_t CSR_no, uint32_t value);

uint32_t io_read(uint32_t addr, uint32_t* data);
uint32_t io_write(uint32_t addr, uint32_t* data);

Expand Down
41 changes: 29 additions & 12 deletions rv-emulator.c
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
#include <assert.h>
#include <stdlib.h> //for exit()

#include "csr.h"
#include "clint.h"


// initial instruction address upon startup
Expand Down Expand Up @@ -145,10 +145,11 @@ static uint8_t mem[MEMSIZE]; // main memory
#define MEMIO_START 0x10000000
#define MEMIO_END 0x12000000 // exclusive


#define NO_CSRS 4096

// CPU internal state
static REGISTER regs[32];
static uint32_t CSRs[NO_CSRS]; // explicit init?
static unsigned int pc ; // 32-bit PC
static unsigned int mode; // privilege mode: currently M only
static unsigned int reservation; // address for lr/sc ; top 29 bits
Expand All @@ -160,8 +161,6 @@ static unsigned int trace = 0; // trace every instruction
static unsigned int interrupt; // interrupt type
static uint32_t dtb_offset; // offset to DTB

uint32_t no_readkbhit = 0;

// read register
// can optimize by always 0 in x0
REGISTER read_reg(int reg_no)
Expand All @@ -178,6 +177,29 @@ int write_reg(int reg_no, REGISTER data)
}


uint32_t read_CSR(uint32_t CSR_no)
{
if (CSR_no == CSR_MISA)
return 0x40401101;
else if (CSR_no == CSR_MVENDORID)
return 0xff0fff0f;
else if (CSR_no == CSR_CYCLE)
return no_cycles;
else if (CSR_no & 0xc00) {
//printf("read_CSR: 0x%x\n", CSR_no);
}
return CSRs[CSR_no];
}

uint32_t write_CSR(uint32_t CSR_no, uint32_t value)
{
CSRs[CSR_no] = value;
return 1;
}




// memory operation, no sign extension done here
// memory address start at INITIAL_PC, no memory storage below that address
// can improve perf by handling multiple bytes at once
Expand Down Expand Up @@ -620,10 +642,6 @@ int execute_code()
interrupt = 0;
no_cycles++;

if ((no_cycles % 10000) == 0) {
// printf("cycle #: %d , pc=0x%x , kbhit=%d\n", no_cycles, pc , no_readkbhit);
}

// run clint every 1024 instructions
if ((no_cycles & 0x3ff) == 0) {
interrupt = run_clint();
Expand Down Expand Up @@ -765,21 +783,20 @@ void debug_syscall() {
}


// takes one optional argument: machine code file name
// takes two optional argument: machine code file name & dtb file name
int main(int argc, char** argv)
{
load_code((argc<=1)?DEFAULT_FILE:argv[1]);
if (argc >= 2) load_dtb(argv[2]) ;

// initialize CPU state
pc = INITIAL_PC;
mode = MODE_M; // Machine-mode.
no_cycles = 0;

// a10 and a11 needed for Linux
write_reg(10, 0x0); // hart ID
write_reg(11, dtb_offset + INITIAL_PC); // DTB address in memory

// system("");


execute_code();
}
4 changes: 2 additions & 2 deletions rvsim.vcxproj
Original file line number Diff line number Diff line change
Expand Up @@ -119,7 +119,7 @@
</Link>
</ItemDefinitionGroup>
<ItemGroup>
<ClCompile Include="csr.c" />
<ClCompile Include="clint.c" />
<ClCompile Include="rv-emulator.c" />
</ItemGroup>
<ItemGroup>
Expand All @@ -129,7 +129,7 @@
<Text Include="tasks.txt" />
</ItemGroup>
<ItemGroup>
<ClInclude Include="csr.h" />
<ClInclude Include="clint.h" />
</ItemGroup>
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
<ImportGroup Label="ExtensionTargets">
Expand Down
4 changes: 2 additions & 2 deletions rvsim.vcxproj.filters
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@
<ClCompile Include="rv-emulator.c">
<Filter>Source Files</Filter>
</ClCompile>
<ClCompile Include="csr.c">
<ClCompile Include="clint.c">
<Filter>Source Files</Filter>
</ClCompile>
</ItemGroup>
Expand All @@ -29,7 +29,7 @@
<Text Include="tasks.txt" />
</ItemGroup>
<ItemGroup>
<ClInclude Include="csr.h">
<ClInclude Include="clint.h">
<Filter>Header Files</Filter>
</ClInclude>
</ItemGroup>
Expand Down

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